{"title":"优化的CMOS-SOI工艺用于高性能射频开关","authors":"A. Joshi, S. Lee, Y. Y. Chen, T. Y. Lee","doi":"10.1109/SOI.2012.6404385","DOIUrl":null,"url":null,"abstract":"In recent years, CMOS on Silicon-on-Insulator has rapidly evolved as a mainstream technology for switches used in wireless applications. Since such applications can involve switching high power levels (35 dBm) at high frequencies (~2 GHz), the technology considerations are substantially different than those for SOI used in high speed, small signal applications such as microprocessors. This paper provides an overview of key technology challenges and trade-offs.","PeriodicalId":306839,"journal":{"name":"2012 IEEE International SOI Conference (SOI)","volume":"206 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":"{\"title\":\"Optimized CMOS-SOI process for high performance RF switches\",\"authors\":\"A. Joshi, S. Lee, Y. Y. Chen, T. Y. Lee\",\"doi\":\"10.1109/SOI.2012.6404385\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In recent years, CMOS on Silicon-on-Insulator has rapidly evolved as a mainstream technology for switches used in wireless applications. Since such applications can involve switching high power levels (35 dBm) at high frequencies (~2 GHz), the technology considerations are substantially different than those for SOI used in high speed, small signal applications such as microprocessors. This paper provides an overview of key technology challenges and trade-offs.\",\"PeriodicalId\":306839,\"journal\":{\"name\":\"2012 IEEE International SOI Conference (SOI)\",\"volume\":\"206 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"17\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE International SOI Conference (SOI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOI.2012.6404385\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE International SOI Conference (SOI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.2012.6404385","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Optimized CMOS-SOI process for high performance RF switches
In recent years, CMOS on Silicon-on-Insulator has rapidly evolved as a mainstream technology for switches used in wireless applications. Since such applications can involve switching high power levels (35 dBm) at high frequencies (~2 GHz), the technology considerations are substantially different than those for SOI used in high speed, small signal applications such as microprocessors. This paper provides an overview of key technology challenges and trade-offs.