{"title":"形态库计算硬件","authors":"Fabio Galán-Prado, J. Font-Rosselló, J. Rosselló","doi":"10.1109/PATMOS.2019.8862100","DOIUrl":null,"url":null,"abstract":"In the recent years, Reservoir Computing arises as an emerging machine-learning technique that is highly suitable for time-series processing. In this work, we propose the implementation of reservoir computing systems in hardware via morphological neurons which make use of tropical algebra concepts that allow us to reduce the area cost in the neural synapses. The main consequence of using tropical algebra is that synapses multipliers are substituted by adders, with lower hardware requirements. The proposed design is synthesized in a Field-Programmable Gate Array (FPGA) and benchmarked against a time-series prediction task. The current approach achieves significant savings in terms of power and hardware, as well as an appreciable higher precision if compared to classical reservoir systems.","PeriodicalId":430458,"journal":{"name":"2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Morphological Reservoir Computing Hardware\",\"authors\":\"Fabio Galán-Prado, J. Font-Rosselló, J. Rosselló\",\"doi\":\"10.1109/PATMOS.2019.8862100\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In the recent years, Reservoir Computing arises as an emerging machine-learning technique that is highly suitable for time-series processing. In this work, we propose the implementation of reservoir computing systems in hardware via morphological neurons which make use of tropical algebra concepts that allow us to reduce the area cost in the neural synapses. The main consequence of using tropical algebra is that synapses multipliers are substituted by adders, with lower hardware requirements. The proposed design is synthesized in a Field-Programmable Gate Array (FPGA) and benchmarked against a time-series prediction task. The current approach achieves significant savings in terms of power and hardware, as well as an appreciable higher precision if compared to classical reservoir systems.\",\"PeriodicalId\":430458,\"journal\":{\"name\":\"2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)\",\"volume\":\"60 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PATMOS.2019.8862100\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PATMOS.2019.8862100","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
In the recent years, Reservoir Computing arises as an emerging machine-learning technique that is highly suitable for time-series processing. In this work, we propose the implementation of reservoir computing systems in hardware via morphological neurons which make use of tropical algebra concepts that allow us to reduce the area cost in the neural synapses. The main consequence of using tropical algebra is that synapses multipliers are substituted by adders, with lower hardware requirements. The proposed design is synthesized in a Field-Programmable Gate Array (FPGA) and benchmarked against a time-series prediction task. The current approach achieves significant savings in terms of power and hardware, as well as an appreciable higher precision if compared to classical reservoir systems.