一种利用SRAM位元中负载晶体管变化的物理不可克隆功能芯片

2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC) Pub Date : 2013-04-29 DOI:10.1109/ASPDAC.2013.6509565

S. Okumura, S. Yoshimoto, H. Kawaguchi, M. Yoshimoto

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引用次数: 3

摘要

我们提出了一种在SRAM位元中随机变化晶体管特性的芯片识别(ID)生成方案。在该方案中，通过将两个位线接地来生成唯一指纹。它具有很高的速度，并且可以在非常小的面积开销中实现。我们在65纳米工艺下制作了测试芯片，获得了12288组唯一的128位指纹，并在本文中对其进行了评估。IDs的故障率为2.1 × 10-12。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A physical unclonable function chip exploiting load transistors' variation in SRAM bitcells

We propose a chip identification (ID) generating scheme with random variation of transistor characteristics in SRAM bitcells. In the proposed scheme, a unique fingerprint is generated by grounding both bitlines. It has high speed, and it can be implemented in a very small area overhead. We fabricated test chips in a 65-nm process and obtained 12,288 sets of unique 128-bit fingerprints, which are evaluated in this paper. The failure rate of the IDs is found to be 2.1 × 10-12.

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2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC)

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