定制集成电路生产线的成品率建模

IEEE/SEMI Conference on Advanced Semiconductor Manufacturing Workshop Pub Date : 1990-09-11 DOI:10.1109/ASMC.1990.111226

P. Fang

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引用次数: 3

摘要

介绍了一种在定制集成电路制造设施中实现成品率建模的方法。描述了模型输入的来源。解释了成品率建模的组件方法，其中组件缺陷密度(D/sub 0/)信息用于构建整体成品率预测。详细介绍了使用单个D/sub 0/ number的反向模型。给出了模型选择的验证和选择标准。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Yield modeling in a custom IC manufacturing line

A methodology used to implement yield modeling in a custom integrated-circuit manufacturing facility is described. The sources for the inputs to the models are described. The component approach to yield modeling is explained, where component defect density (D/sub 0/) information is used to build an overall yield prediction. A reverse model using a single D/sub 0/ number is detailed. Verifications and selection criteria are given for model selection.<>

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IEEE/SEMI Conference on Advanced Semiconductor Manufacturing Workshop

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