2GHz CMOS降噪压控振荡器

2008 IEEE Asian Solid-State Circuits Conference Pub Date : 2008-12-12 DOI:10.1109/ASSCC.2008.4708827

A. Bansal, C. Heng, Yuanjin Zheng

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引用次数: 8

摘要

采用噪声消除技术，在0.35 μ m CMOS上变频制备了一种2 GHz CMOS压控振荡器。采用所提出的技术，总体相位噪声降低了10 dB，相位噪声达到-121.6 dBc/Hz@500 kHz偏置。在2.4V电源下，VCO芯线功耗为2.8 mA，面积为0.7 mm × 0.8 mm。所提出的压控振荡器的测量频率为-186 dBc/Hz。

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2GHz CMOS noise cancellation VCO

A 2 GHz CMOS VCO, employing noise cancellation to eliminate flicker noise up-conversion, has been fabricated in 0.35 mum CMOS. An overall phase noise reduction of 10 dB has been measured with the proposed technique, and phase noise of -121.6 dBc/Hz@500 kHz offset has been achieved. The VCO core consumes 2.8 mA under 2.4V supply and occupies an area of 0.7 mmtimes0.8 mm. The proposed VCO measured FOM of -186 dBc/Hz.

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2008 IEEE Asian Solid-State Circuits Conference

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