{"title":"准确表征板级互连的高性能系统","authors":"R. Lutz, A. Tripathi, V. K. Tripathi, T. Arabi","doi":"10.1109/EPEP.1997.634064","DOIUrl":null,"url":null,"abstract":"Calibration and de-embedding techniques for time domain measurements associated with high speed off chip digital interconnects are presented. The techniques are demonstrated by measurements of skew, signal degradation, and crosstalk associated with typical interconnects in multilayered boards.","PeriodicalId":220951,"journal":{"name":"Electrical Performance of Electronic Packaging","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Accurate characterization of board level interconnects for high performance systems\",\"authors\":\"R. Lutz, A. Tripathi, V. K. Tripathi, T. Arabi\",\"doi\":\"10.1109/EPEP.1997.634064\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Calibration and de-embedding techniques for time domain measurements associated with high speed off chip digital interconnects are presented. The techniques are demonstrated by measurements of skew, signal degradation, and crosstalk associated with typical interconnects in multilayered boards.\",\"PeriodicalId\":220951,\"journal\":{\"name\":\"Electrical Performance of Electronic Packaging\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-10-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Electrical Performance of Electronic Packaging\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEP.1997.634064\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Electrical Performance of Electronic Packaging","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEP.1997.634064","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Accurate characterization of board level interconnects for high performance systems
Calibration and de-embedding techniques for time domain measurements associated with high speed off chip digital interconnects are presented. The techniques are demonstrated by measurements of skew, signal degradation, and crosstalk associated with typical interconnects in multilayered boards.
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