M. Voelkel, M. Dietz, A. Hagelauer, E. M. Hussein, D. Kissinger, R. Weigel
{"title":"基于130nm BiCMOS技术的60 GHz数字可调全集成双基地干涉雷达收发器","authors":"M. Voelkel, M. Dietz, A. Hagelauer, E. M. Hussein, D. Kissinger, R. Weigel","doi":"10.23919/EuMIC.2019.8909608","DOIUrl":null,"url":null,"abstract":"In this paper a 60 GHz monolithic bistatic interferometric radar transceiver for high precision measuring is presented. The integrated transceiver has been designed using a 0.13 μm SiGe BiCMOS process from IHP (SG13G2) and includes a LNA, a passive six-port structure, detectors, multiplier, multiplexer, power amplifier and a digital interface. The chip has a size of 2330 μm x 1360 μm and a maximum power consumption of 533 mW from a 3.3 V power supply. The circuit provides two frequency inputs of 7.5 and 15 GHz and multiplies them up to 60 GHz at a minimum input power of -20 dBm. The chip delivers a maximum output power of 9 dBm at 61 GHz. The input path is selectable and the output power is adjustable by a digital interface between -23 and 9 dBm at 60 GHz. Also the reference input power of the six-port and the RF input power can be adjusted in a range of 13.2 dB. The minimum input referred P1dB is -24.1 dBm. With a multiplexer, the receiver reference can be separated from the transmitter, which allows the use of both independently from each other. The serial interface is realized in 0.13 μm CMOS logic and consists of a 20 bit shift register, decoder and an analog interface.","PeriodicalId":228725,"journal":{"name":"2019 14th European Microwave Integrated Circuits Conference (EuMIC)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A Digital Adjustable Fully Integrated Bistatic Interferometric Radar Transceiver at 60 GHz in a 130 nm BiCMOS Technology\",\"authors\":\"M. Voelkel, M. Dietz, A. Hagelauer, E. M. Hussein, D. Kissinger, R. Weigel\",\"doi\":\"10.23919/EuMIC.2019.8909608\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper a 60 GHz monolithic bistatic interferometric radar transceiver for high precision measuring is presented. The integrated transceiver has been designed using a 0.13 μm SiGe BiCMOS process from IHP (SG13G2) and includes a LNA, a passive six-port structure, detectors, multiplier, multiplexer, power amplifier and a digital interface. The chip has a size of 2330 μm x 1360 μm and a maximum power consumption of 533 mW from a 3.3 V power supply. The circuit provides two frequency inputs of 7.5 and 15 GHz and multiplies them up to 60 GHz at a minimum input power of -20 dBm. The chip delivers a maximum output power of 9 dBm at 61 GHz. The input path is selectable and the output power is adjustable by a digital interface between -23 and 9 dBm at 60 GHz. Also the reference input power of the six-port and the RF input power can be adjusted in a range of 13.2 dB. The minimum input referred P1dB is -24.1 dBm. With a multiplexer, the receiver reference can be separated from the transmitter, which allows the use of both independently from each other. The serial interface is realized in 0.13 μm CMOS logic and consists of a 20 bit shift register, decoder and an analog interface.\",\"PeriodicalId\":228725,\"journal\":{\"name\":\"2019 14th European Microwave Integrated Circuits Conference (EuMIC)\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 14th European Microwave Integrated Circuits Conference (EuMIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/EuMIC.2019.8909608\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 14th European Microwave Integrated Circuits Conference (EuMIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/EuMIC.2019.8909608","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Digital Adjustable Fully Integrated Bistatic Interferometric Radar Transceiver at 60 GHz in a 130 nm BiCMOS Technology
In this paper a 60 GHz monolithic bistatic interferometric radar transceiver for high precision measuring is presented. The integrated transceiver has been designed using a 0.13 μm SiGe BiCMOS process from IHP (SG13G2) and includes a LNA, a passive six-port structure, detectors, multiplier, multiplexer, power amplifier and a digital interface. The chip has a size of 2330 μm x 1360 μm and a maximum power consumption of 533 mW from a 3.3 V power supply. The circuit provides two frequency inputs of 7.5 and 15 GHz and multiplies them up to 60 GHz at a minimum input power of -20 dBm. The chip delivers a maximum output power of 9 dBm at 61 GHz. The input path is selectable and the output power is adjustable by a digital interface between -23 and 9 dBm at 60 GHz. Also the reference input power of the six-port and the RF input power can be adjusted in a range of 13.2 dB. The minimum input referred P1dB is -24.1 dBm. With a multiplexer, the receiver reference can be separated from the transmitter, which allows the use of both independently from each other. The serial interface is realized in 0.13 μm CMOS logic and consists of a 20 bit shift register, decoder and an analog interface.