功率半导体超薄晶圆上的贴片能力

Z. Abdullah, L. Vigneswaran, A. Ang, G. Yuan
{"title":"功率半导体超薄晶圆上的贴片能力","authors":"Z. Abdullah, L. Vigneswaran, A. Ang, G. Yuan","doi":"10.1109/IEMT.2012.6521812","DOIUrl":null,"url":null,"abstract":"In the fast- paced semiconductor industry the need for package solution arises in order to cope with emerging miniaturization trend. As wafer thickness decreases to 100 μm and below, manufacturing challenges arise. Ultra-thin wafers are less stable and more vulnerable to stresses, and the die can be prone to breaking and warping not only during grinding but also at subsequent processing steps.Thinner dies will be able to perform faster heat dissipation to the Cu leadframe to improve the Rth and at the same time will be able to improve the Rdson performance. An effort to assemble an Ultra Thin Dies has been made at die bonding using soft solder, solder paste and also Au Sn Diffusion Soldering. This paper discusses the process optimization and challenges being done at die bond process by using multi needles and peel and ramp concept in order to pick and place such a thin dies in the range of chip thickness less than 60 um . Challenges such as die warpage has been minimized by optimizing the impact of vacuum suction during pick and place on the ultra thin wafer since thin die is very flexible and will be very much influence by the vacuum suction force. The other key parameter is the design of the collect vacuum holes which induced the suction force across the chip surface and will influence its stability during pick and place. The two concepts of pick and place using multi needles and peel and ramp have its own advantages and disadvantages. The experiments conducted revealed the capability of the multi needles and peel and ramp and for stable production both concept works in certain chip sizes with its own process limitation. A feasibility study on ultra thin wafer thickness during pick up and assembly process shows the concept used at die bonding can reduces the stress impact exerted on the chip during pick and place with a proper design of die bonding collet, reduction of die warpage and effect of vacuum suction during pick up process. However in order to achieve a stable production a lot of efforts still need to be done and it involves process optimization , die bonding equipment control and front end wafer technology side.","PeriodicalId":315408,"journal":{"name":"2012 35th IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"23","resultStr":"{\"title\":\"Die attach capability on ultra thin wafer thickness for power semiconductor\",\"authors\":\"Z. Abdullah, L. Vigneswaran, A. Ang, G. Yuan\",\"doi\":\"10.1109/IEMT.2012.6521812\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In the fast- paced semiconductor industry the need for package solution arises in order to cope with emerging miniaturization trend. As wafer thickness decreases to 100 μm and below, manufacturing challenges arise. Ultra-thin wafers are less stable and more vulnerable to stresses, and the die can be prone to breaking and warping not only during grinding but also at subsequent processing steps.Thinner dies will be able to perform faster heat dissipation to the Cu leadframe to improve the Rth and at the same time will be able to improve the Rdson performance. An effort to assemble an Ultra Thin Dies has been made at die bonding using soft solder, solder paste and also Au Sn Diffusion Soldering. This paper discusses the process optimization and challenges being done at die bond process by using multi needles and peel and ramp concept in order to pick and place such a thin dies in the range of chip thickness less than 60 um . Challenges such as die warpage has been minimized by optimizing the impact of vacuum suction during pick and place on the ultra thin wafer since thin die is very flexible and will be very much influence by the vacuum suction force. The other key parameter is the design of the collect vacuum holes which induced the suction force across the chip surface and will influence its stability during pick and place. The two concepts of pick and place using multi needles and peel and ramp have its own advantages and disadvantages. The experiments conducted revealed the capability of the multi needles and peel and ramp and for stable production both concept works in certain chip sizes with its own process limitation. A feasibility study on ultra thin wafer thickness during pick up and assembly process shows the concept used at die bonding can reduces the stress impact exerted on the chip during pick and place with a proper design of die bonding collet, reduction of die warpage and effect of vacuum suction during pick up process. However in order to achieve a stable production a lot of efforts still need to be done and it involves process optimization , die bonding equipment control and front end wafer technology side.\",\"PeriodicalId\":315408,\"journal\":{\"name\":\"2012 35th IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)\",\"volume\":\"32 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"23\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 35th IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMT.2012.6521812\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 35th IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.2012.6521812","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 23

摘要

在快节奏的半导体工业中,为了应对新兴的小型化趋势,对封装解决方案的需求日益增加。当晶圆厚度减小到100 μm及以下时,制造挑战就出现了。超薄晶圆不太稳定,更容易受到应力的影响,而且不仅在磨削过程中,而且在随后的加工步骤中,模具容易断裂和翘曲。更薄的模具将能够更快地散热到Cu引线框架,以改善Rth,同时将能够提高Rdson性能。在使用软焊锡,锡膏和Au - Sn扩散焊接的模具粘接中,努力组装超薄模具。本文讨论了在模具粘合过程中使用多针、剥离和斜坡概念进行的工艺优化和挑战,以便在芯片厚度小于60 um的范围内挑选和放置这样的薄模具。由于超薄晶圆片在拾取和放置过程中非常灵活,并且受到真空吸力的很大影响,因此通过优化真空吸力的影响,可以最大限度地减少模具翘曲等挑战。另一个关键参数是收集真空孔的设计,收集真空孔的设计会引起整个切屑表面的吸力,并将影响其在拾取和放置过程中的稳定性。多针采摘放置和剥离坡道两种概念各有优缺点。所进行的实验揭示了多针、剥离和斜坡的能力,以及稳定生产的能力,这两个概念都适用于某些芯片尺寸,但有其自身的工艺限制。通过对超薄晶圆夹装过程的可行性研究表明,通过合理设计粘接夹头、减少模具翘曲和真空吸力的作用,采用超薄晶圆夹装概念可以减小晶圆夹装过程中对晶圆的应力冲击。然而,为了实现稳定的生产,仍然需要做很多努力,包括工艺优化,模具粘接设备控制和前端晶圆技术方面。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Die attach capability on ultra thin wafer thickness for power semiconductor
In the fast- paced semiconductor industry the need for package solution arises in order to cope with emerging miniaturization trend. As wafer thickness decreases to 100 μm and below, manufacturing challenges arise. Ultra-thin wafers are less stable and more vulnerable to stresses, and the die can be prone to breaking and warping not only during grinding but also at subsequent processing steps.Thinner dies will be able to perform faster heat dissipation to the Cu leadframe to improve the Rth and at the same time will be able to improve the Rdson performance. An effort to assemble an Ultra Thin Dies has been made at die bonding using soft solder, solder paste and also Au Sn Diffusion Soldering. This paper discusses the process optimization and challenges being done at die bond process by using multi needles and peel and ramp concept in order to pick and place such a thin dies in the range of chip thickness less than 60 um . Challenges such as die warpage has been minimized by optimizing the impact of vacuum suction during pick and place on the ultra thin wafer since thin die is very flexible and will be very much influence by the vacuum suction force. The other key parameter is the design of the collect vacuum holes which induced the suction force across the chip surface and will influence its stability during pick and place. The two concepts of pick and place using multi needles and peel and ramp have its own advantages and disadvantages. The experiments conducted revealed the capability of the multi needles and peel and ramp and for stable production both concept works in certain chip sizes with its own process limitation. A feasibility study on ultra thin wafer thickness during pick up and assembly process shows the concept used at die bonding can reduces the stress impact exerted on the chip during pick and place with a proper design of die bonding collet, reduction of die warpage and effect of vacuum suction during pick up process. However in order to achieve a stable production a lot of efforts still need to be done and it involves process optimization , die bonding equipment control and front end wafer technology side.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Interfacial reactions between Sn-3.8 Ag-0.7Cu solder and Ni-W alloy films Removal of flux residues from highly dense assemblies On the drop impact performance of IPDTM devices with different process technologies Pad bending improvement on copper wire bonding on NiP/Pd/Au bond pad Mold compound selection study for CMOS90 176 lead LQFP 24×24mm package
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1