Improvement of the triangular MOS transistor for misalignment measurement

An improvement of the triangular gate MOS transistor for misalignment measurement between gate and active area levels is presented. The number of devices required for the simultaneous determination of X and Y misalignment is reduced from four to three, resulting in a very compact structure with just four pads. Although this simplification is obtained at the cost of an increment of the complexity of the calculations, a simple iterative algorithm is enough to solve them. Two different device arrangements have been designed and fabricated with a NMOS/CMOS, 5- mu m, polysilicon gate technology.<>