{"title":"包含空间电流不稳定模式的Si-Ge BiCMOS ESD结构工作模拟","authors":"Vladislav Vashchenko, Peter J. Hopper","doi":"10.1109/MIEL.2002.1003364","DOIUrl":null,"url":null,"abstract":"A 2D simulation approach that takes into account the 3D effects of electro-thermal instability during ESD operation, has been presented. The method is used to provide physical evaluation of a safe operation regime of ESD protection structures and circuits. First results of ESD stress induced hot spot formation using 3D simulation have been presented for the case of a simplified snapback n-MOS device.","PeriodicalId":221518,"journal":{"name":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Simulation of Si-Ge BiCMOS ESD structures operation including spatial current instability mode\",\"authors\":\"Vladislav Vashchenko, Peter J. Hopper\",\"doi\":\"10.1109/MIEL.2002.1003364\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 2D simulation approach that takes into account the 3D effects of electro-thermal instability during ESD operation, has been presented. The method is used to provide physical evaluation of a safe operation regime of ESD protection structures and circuits. First results of ESD stress induced hot spot formation using 3D simulation have been presented for the case of a simplified snapback n-MOS device.\",\"PeriodicalId\":221518,\"journal\":{\"name\":\"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MIEL.2002.1003364\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MIEL.2002.1003364","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Simulation of Si-Ge BiCMOS ESD structures operation including spatial current instability mode
A 2D simulation approach that takes into account the 3D effects of electro-thermal instability during ESD operation, has been presented. The method is used to provide physical evaluation of a safe operation regime of ESD protection structures and circuits. First results of ESD stress induced hot spot formation using 3D simulation have been presented for the case of a simplified snapback n-MOS device.
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