A. Marchlewski, H. Zimmermann, I. Jonak-Auer, E. Wachmann
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引用次数: 0
摘要
在这项工作中，我们提出了在0.35 μ m SiGe BiCMOS技术中，作为宽带OEIC芯片设计前端传感电路的非线性环路拓扑的可用性。结果是一个完全单片集成的1 gbps光接收器，在675nm处具有- 20dBm的灵敏度，采用成熟的硅基技术，适合作为塑料光纤(POF)接收器或通常作为短距离光互连的接收器。
In this work we present the usability of the translinear loop topology as frontend sensing circuit for broadband OEIC chip design in a 0.35µm SiGe BiCMOS technology. The result is a fully monolithically integrated 1-Gbps optical receiver with a sensitivity of −20dBm at 675nm in a mature silicon-based technology, which is appropriate e. g. as a plastic optical fiber (POF) receiver or generally as receiver in short-range optical interconnects.
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