在先进技术节点的高性能电路中，FinFET比平面MOSFET有一个鲜为人知的优势

2012 IEEE International SOI Conference (SOI) Pub Date : 2012-10-01 DOI:10.1109/SOI.2012.6404367

A. Sachid, C. Hu

{"title":"在先进技术节点的高性能电路中，FinFET比平面MOSFET有一个鲜为人知的优势","authors":"A. Sachid, C. Hu","doi":"10.1109/SOI.2012.6404367","DOIUrl":null,"url":null,"abstract":"There is a difference in the nature of parasitic capacitance with electrical width of planar MOSFET and FinFET. This difference can be used to optimize FinFET circuits to achieve lower power dissipation and power density compared to planar MOSFET circuits. To achieve the best results, circuits should be re-optimized considering the parasitics before replacing planar MOSFETs with FinFETs.","PeriodicalId":306839,"journal":{"name":"2012 IEEE International SOI Conference (SOI)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"20","resultStr":"{\"title\":\"A little known benefit of FinFET over Planar MOSFET in highperformance circuits at advanced technology nodes\",\"authors\":\"A. Sachid, C. Hu\",\"doi\":\"10.1109/SOI.2012.6404367\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"There is a difference in the nature of parasitic capacitance with electrical width of planar MOSFET and FinFET. This difference can be used to optimize FinFET circuits to achieve lower power dissipation and power density compared to planar MOSFET circuits. To achieve the best results, circuits should be re-optimized considering the parasitics before replacing planar MOSFETs with FinFETs.\",\"PeriodicalId\":306839,\"journal\":{\"name\":\"2012 IEEE International SOI Conference (SOI)\",\"volume\":\"86 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"20\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE International SOI Conference (SOI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOI.2012.6404367\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE International SOI Conference (SOI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.2012.6404367","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 20

摘要

平面MOSFET和FinFET的寄生电容随电宽的性质有所不同。与平面MOSFET电路相比，这种差异可用于优化FinFET电路，以实现更低的功耗和功率密度。为了达到最佳效果，在用finfet取代平面mosfet之前，应考虑寄生效应对电路进行重新优化。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

A little known benefit of FinFET over Planar MOSFET in highperformance circuits at advanced technology nodes

There is a difference in the nature of parasitic capacitance with electrical width of planar MOSFET and FinFET. This difference can be used to optimize FinFET circuits to achieve lower power dissipation and power density compared to planar MOSFET circuits. To achieve the best results, circuits should be re-optimized considering the parasitics before replacing planar MOSFETs with FinFETs.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2012 IEEE International SOI Conference (SOI)

自引率

0.00%

发文量

期刊最新文献

BSIM-IMG: A Turnkey compact model for fully depleted technologies SOI tri-gate nanowire MOSFETs for ultra-low power LSI Key enabling processes for more-than-moore technologies High voltage SOI MESFETs at the 45nm technology node Cryogenic operation of double-gate FinFET and demonstration of analog circuit at 4.2K