{"title":"高速串行链路的10Gb/s决策反馈均衡器","authors":"Ali Kiaei, B. Matinpour, Ahmad Bahai, T. Lee","doi":"10.1109/CICC.2007.4405734","DOIUrl":null,"url":null,"abstract":"A 10 Gb/s equalizer using both feedforward and decision-feedback equalization is designed for high speed serial-links. The chip is implemented in a standard 0.25 mum SiGe BiCMOS technology with 50 GHz peak ft, and packaged in a commercial LLP package. Using a 4-stage feedforward and 2-tap post-cursor cancellation, this equalizer achieves a total peak-to-peak jitter of 27 ps and 33 ps for 10\" and 20\" of copper traces on FR4, respectively. The transmitter uses NRZ signaling with no pre-emphasis.","PeriodicalId":130106,"journal":{"name":"2007 IEEE Custom Integrated Circuits Conference","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A 10Gb/s Equalizer with Decision Feedback for High Speed Serial Links\",\"authors\":\"Ali Kiaei, B. Matinpour, Ahmad Bahai, T. Lee\",\"doi\":\"10.1109/CICC.2007.4405734\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 10 Gb/s equalizer using both feedforward and decision-feedback equalization is designed for high speed serial-links. The chip is implemented in a standard 0.25 mum SiGe BiCMOS technology with 50 GHz peak ft, and packaged in a commercial LLP package. Using a 4-stage feedforward and 2-tap post-cursor cancellation, this equalizer achieves a total peak-to-peak jitter of 27 ps and 33 ps for 10\\\" and 20\\\" of copper traces on FR4, respectively. The transmitter uses NRZ signaling with no pre-emphasis.\",\"PeriodicalId\":130106,\"journal\":{\"name\":\"2007 IEEE Custom Integrated Circuits Conference\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2007.4405734\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2007.4405734","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
摘要
针对高速串行链路，设计了一种采用前馈和决策反馈均衡的10gb /s均衡器。该芯片采用标准的0.25 μ m SiGe BiCMOS技术，峰值频率为50 GHz，并封装在商用LLP封装中。使用4级前馈和2分导后光标消除，该均衡器在FR4上的10”和20”铜走线分别实现了27 ps和33 ps的峰对峰抖动。发射机使用无预强调的NRZ信号。
A 10Gb/s Equalizer with Decision Feedback for High Speed Serial Links
A 10 Gb/s equalizer using both feedforward and decision-feedback equalization is designed for high speed serial-links. The chip is implemented in a standard 0.25 mum SiGe BiCMOS technology with 50 GHz peak ft, and packaged in a commercial LLP package. Using a 4-stage feedforward and 2-tap post-cursor cancellation, this equalizer achieves a total peak-to-peak jitter of 27 ps and 33 ps for 10" and 20" of copper traces on FR4, respectively. The transmitter uses NRZ signaling with no pre-emphasis.
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