{"title":"用于射频功率放大器片上ESD保护的可控硅器件","authors":"Chun-Yu Lin, M. Ker","doi":"10.1109/EDSSC.2013.6628124","DOIUrl":null,"url":null,"abstract":"To protect a radio-frequency (RF) power amplifier from electrostatic discharge (ESD) damages, a low-capacitance, high-robust, and good-latchup-immune ESD protection device was proposed in this work. The proposed design has been realized in a compact structure in a 65-nm CMOS process. Experimental results of the test devices have been successfully verified, including RF performances, I-V characteristics, and ESD robustness.","PeriodicalId":333267,"journal":{"name":"2013 IEEE International Conference of Electron Devices and Solid-state Circuits","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2013-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"SCR device for on-chip ESD protection in RF power amplifier\",\"authors\":\"Chun-Yu Lin, M. Ker\",\"doi\":\"10.1109/EDSSC.2013.6628124\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"To protect a radio-frequency (RF) power amplifier from electrostatic discharge (ESD) damages, a low-capacitance, high-robust, and good-latchup-immune ESD protection device was proposed in this work. The proposed design has been realized in a compact structure in a 65-nm CMOS process. Experimental results of the test devices have been successfully verified, including RF performances, I-V characteristics, and ESD robustness.\",\"PeriodicalId\":333267,\"journal\":{\"name\":\"2013 IEEE International Conference of Electron Devices and Solid-state Circuits\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-06-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE International Conference of Electron Devices and Solid-state Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDSSC.2013.6628124\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE International Conference of Electron Devices and Solid-state Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDSSC.2013.6628124","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
SCR device for on-chip ESD protection in RF power amplifier
To protect a radio-frequency (RF) power amplifier from electrostatic discharge (ESD) damages, a low-capacitance, high-robust, and good-latchup-immune ESD protection device was proposed in this work. The proposed design has been realized in a compact structure in a 65-nm CMOS process. Experimental results of the test devices have been successfully verified, including RF performances, I-V characteristics, and ESD robustness.