{"title":"一种改进的GaAs mesfet栅电容模型","authors":"J. Kotz","doi":"10.1109/GAAS.1996.567843","DOIUrl":null,"url":null,"abstract":"This paper describes the measurement and modeling of gate capacitance for self-aligned, LDD GaAs EFETs and DFETs. An improved, scalable gate capacitance model is presented which is suitable for compact device simulation.","PeriodicalId":365997,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium. 18th Annual Technical Digest 1996","volume":"130 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"An improved gate capacitance model for GaAs MESFETs\",\"authors\":\"J. Kotz\",\"doi\":\"10.1109/GAAS.1996.567843\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes the measurement and modeling of gate capacitance for self-aligned, LDD GaAs EFETs and DFETs. An improved, scalable gate capacitance model is presented which is suitable for compact device simulation.\",\"PeriodicalId\":365997,\"journal\":{\"name\":\"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium. 18th Annual Technical Digest 1996\",\"volume\":\"130 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-11-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium. 18th Annual Technical Digest 1996\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/GAAS.1996.567843\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium. 18th Annual Technical Digest 1996","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GAAS.1996.567843","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An improved gate capacitance model for GaAs MESFETs
This paper describes the measurement and modeling of gate capacitance for self-aligned, LDD GaAs EFETs and DFETs. An improved, scalable gate capacitance model is presented which is suitable for compact device simulation.