使用新测试结构测量p型SiGe/金属触点的低比接触电阻率,并使用闪光灯退火将其降低到10−9欧姆-平方厘米

H. Tanimura, H. Kawarazaki, T. Aoyama, S. Kato, Yoshihide Nozaki, R. Wada, T. Higuchi, T. Nagayama, T. Kuroi
{"title":"使用新测试结构测量p型SiGe/金属触点的低比接触电阻率,并使用闪光灯退火将其降低到10−9欧姆-平方厘米","authors":"H. Tanimura, H. Kawarazaki, T. Aoyama, S. Kato, Yoshihide Nozaki, R. Wada, T. Higuchi, T. Nagayama, T. Kuroi","doi":"10.23919/IWJT.2019.8802623","DOIUrl":null,"url":null,"abstract":"Reduction of the contact resistance at source/drain and metal electrodes is one of the key challenges in the fabrication of high performance CMOS devices. In recent years, several studies have addressed the issue of minimizing the specific contact resistivity (ρ c ) [1] – [5] . Quite low values of ρ c in the sub-10 −9 ohm-cm 2 region have been reported for advanced technologies.","PeriodicalId":441279,"journal":{"name":"2019 19th International Workshop on Junction Technology (IWJT)","volume":"105 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Low Specific Contact Resistivity Measurements using a New Test Structure and its Reduction to 10−9 ohm-cm2 in p-type SiGe/Metal Contacts using Flash Lamp Annealing\",\"authors\":\"H. Tanimura, H. Kawarazaki, T. Aoyama, S. Kato, Yoshihide Nozaki, R. Wada, T. Higuchi, T. Nagayama, T. Kuroi\",\"doi\":\"10.23919/IWJT.2019.8802623\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Reduction of the contact resistance at source/drain and metal electrodes is one of the key challenges in the fabrication of high performance CMOS devices. In recent years, several studies have addressed the issue of minimizing the specific contact resistivity (ρ c ) [1] – [5] . Quite low values of ρ c in the sub-10 −9 ohm-cm 2 region have been reported for advanced technologies.\",\"PeriodicalId\":441279,\"journal\":{\"name\":\"2019 19th International Workshop on Junction Technology (IWJT)\",\"volume\":\"105 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 19th International Workshop on Junction Technology (IWJT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/IWJT.2019.8802623\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 19th International Workshop on Junction Technology (IWJT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/IWJT.2019.8802623","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

降低源极/漏极和金属电极的接触电阻是制造高性能CMOS器件的关键挑战之一。近年来,一些研究已经解决了最小化比接触电阻率(ρ c)的问题[1]-[5]。在10−9欧姆-平方厘米以下的区域,ρ c值很低。
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Low Specific Contact Resistivity Measurements using a New Test Structure and its Reduction to 10−9 ohm-cm2 in p-type SiGe/Metal Contacts using Flash Lamp Annealing
Reduction of the contact resistance at source/drain and metal electrodes is one of the key challenges in the fabrication of high performance CMOS devices. In recent years, several studies have addressed the issue of minimizing the specific contact resistivity (ρ c ) [1] – [5] . Quite low values of ρ c in the sub-10 −9 ohm-cm 2 region have been reported for advanced technologies.
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