{"title":"沟隔离SOI双极过程","authors":"D. Shain, R. Badilo","doi":"10.1109/SOSSOI.1990.145720","DOIUrl":null,"url":null,"abstract":"BESOI (bond and etchback silicon-on-insulator) substrates were used to create a trench isolated SOI process. The SOI substrates reduce the substrate capacitance and achieve better decoupling between digital and analog portions of the circuits. Changes were made to the process to incorporate the SOI substrates, but overall the process complexity was reduced using these substrates. The BESOI substrates, with approximately 3 mu m of thinned p-type silicon on 1 mu m of buried oxide, were processed through buried layer, epi, and N+ deep collector processes. The trench silicon etch was masked with a sandwich of LTO, nitride, and pad oxide. A 5- mu m-deep silicon trench etch was done before the etch stops on the buried oxide. After a thin sacrificial oxide was grown on the trench side walls, the thin pad oxide was stripped with a buffered HF dip. The electrical characteristics of the material were excellent.<<ETX>>","PeriodicalId":344373,"journal":{"name":"1990 IEEE SOS/SOI Technology Conference. Proceedings","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A trench isolated SOI bipolar process\",\"authors\":\"D. Shain, R. Badilo\",\"doi\":\"10.1109/SOSSOI.1990.145720\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"BESOI (bond and etchback silicon-on-insulator) substrates were used to create a trench isolated SOI process. The SOI substrates reduce the substrate capacitance and achieve better decoupling between digital and analog portions of the circuits. Changes were made to the process to incorporate the SOI substrates, but overall the process complexity was reduced using these substrates. The BESOI substrates, with approximately 3 mu m of thinned p-type silicon on 1 mu m of buried oxide, were processed through buried layer, epi, and N+ deep collector processes. The trench silicon etch was masked with a sandwich of LTO, nitride, and pad oxide. A 5- mu m-deep silicon trench etch was done before the etch stops on the buried oxide. After a thin sacrificial oxide was grown on the trench side walls, the thin pad oxide was stripped with a buffered HF dip. The electrical characteristics of the material were excellent.<<ETX>>\",\"PeriodicalId\":344373,\"journal\":{\"name\":\"1990 IEEE SOS/SOI Technology Conference. Proceedings\",\"volume\":\"41 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-10-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1990 IEEE SOS/SOI Technology Conference. Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOSSOI.1990.145720\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1990 IEEE SOS/SOI Technology Conference. Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOSSOI.1990.145720","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
BESOI (bond and etchback silicon-on-insulator) substrates were used to create a trench isolated SOI process. The SOI substrates reduce the substrate capacitance and achieve better decoupling between digital and analog portions of the circuits. Changes were made to the process to incorporate the SOI substrates, but overall the process complexity was reduced using these substrates. The BESOI substrates, with approximately 3 mu m of thinned p-type silicon on 1 mu m of buried oxide, were processed through buried layer, epi, and N+ deep collector processes. The trench silicon etch was masked with a sandwich of LTO, nitride, and pad oxide. A 5- mu m-deep silicon trench etch was done before the etch stops on the buried oxide. After a thin sacrificial oxide was grown on the trench side walls, the thin pad oxide was stripped with a buffered HF dip. The electrical characteristics of the material were excellent.<>