Wendy S. Becker, B. McCredie, G. Wilkins, A. Iqbal
{"title":"高性能一级计算机封装的功率分布建模","authors":"Wendy S. Becker, B. McCredie, G. Wilkins, A. Iqbal","doi":"10.1109/EPEP.1993.394554","DOIUrl":null,"url":null,"abstract":"A methodology for obtaining a model of the power distribution of a computer package is presented. This model is suitable for determining the noise and aiding in the design of a computer package. The physical features of a typical first-level multi-layered computer package is shown. Semiconductor chips and decoupling capacitors are placed on the top surface of the package and the module is connected to a board or card for communication with other components of the computer. A schematic of the final inductance model of a multi-layered ceramic single chip module used in computer products is shown.<<ETX>>","PeriodicalId":338671,"journal":{"name":"Proceedings of IEEE Electrical Performance of Electronic Packaging","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"29","resultStr":"{\"title\":\"Power distribution modelling of high performance first level computer packages\",\"authors\":\"Wendy S. Becker, B. McCredie, G. Wilkins, A. Iqbal\",\"doi\":\"10.1109/EPEP.1993.394554\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A methodology for obtaining a model of the power distribution of a computer package is presented. This model is suitable for determining the noise and aiding in the design of a computer package. The physical features of a typical first-level multi-layered computer package is shown. Semiconductor chips and decoupling capacitors are placed on the top surface of the package and the module is connected to a board or card for communication with other components of the computer. A schematic of the final inductance model of a multi-layered ceramic single chip module used in computer products is shown.<<ETX>>\",\"PeriodicalId\":338671,\"journal\":{\"name\":\"Proceedings of IEEE Electrical Performance of Electronic Packaging\",\"volume\":\"25 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-10-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"29\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of IEEE Electrical Performance of Electronic Packaging\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEP.1993.394554\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of IEEE Electrical Performance of Electronic Packaging","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEP.1993.394554","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Power distribution modelling of high performance first level computer packages
A methodology for obtaining a model of the power distribution of a computer package is presented. This model is suitable for determining the noise and aiding in the design of a computer package. The physical features of a typical first-level multi-layered computer package is shown. Semiconductor chips and decoupling capacitors are placed on the top surface of the package and the module is connected to a board or card for communication with other components of the computer. A schematic of the final inductance model of a multi-layered ceramic single chip module used in computer products is shown.<>
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