{"title":"增量二阶MASH11 σ - δ调制器的最优滤波","authors":"Sylvain Maréchal, F. Krummenacher, M. Kayal","doi":"10.1109/ICECS.2011.6122258","DOIUrl":null,"url":null,"abstract":"This paper describes an optimal filter design procedure for a cascaded sigma-delta modulator, starting with a block schematic of a second-order topology and deriving step by step the optimal decoder. The presented filter enhances the resolution of the MASH ADC. The obtained resolution is compared to the classic linear filter.","PeriodicalId":251525,"journal":{"name":"2011 18th IEEE International Conference on Electronics, Circuits, and Systems","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Optimal filtering of an incremental second-order MASH11 sigma-delta modulator\",\"authors\":\"Sylvain Maréchal, F. Krummenacher, M. Kayal\",\"doi\":\"10.1109/ICECS.2011.6122258\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes an optimal filter design procedure for a cascaded sigma-delta modulator, starting with a block schematic of a second-order topology and deriving step by step the optimal decoder. The presented filter enhances the resolution of the MASH ADC. The obtained resolution is compared to the classic linear filter.\",\"PeriodicalId\":251525,\"journal\":{\"name\":\"2011 18th IEEE International Conference on Electronics, Circuits, and Systems\",\"volume\":\"19 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 18th IEEE International Conference on Electronics, Circuits, and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECS.2011.6122258\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 18th IEEE International Conference on Electronics, Circuits, and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2011.6122258","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Optimal filtering of an incremental second-order MASH11 sigma-delta modulator
This paper describes an optimal filter design procedure for a cascaded sigma-delta modulator, starting with a block schematic of a second-order topology and deriving step by step the optimal decoder. The presented filter enhances the resolution of the MASH ADC. The obtained resolution is compared to the classic linear filter.
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