M. Voelkel, M. Dietz, R. Weigel, A. Hagelauer, D. Kissinger
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A low-power 60-GHz integrated sixport receiver front-end in a 130-nm BiCMOS technology
In this paper a 60 GHz monolithic low-power sixport receiver front-end for high precision industrial radar systems is presented. The measurement principle is based on the passive superposition and power detection of two incident millimeter-wave signals. The integrated receiver has been designed using a 0.13 μm SiGe BiCMOS process from IHP (SG13G2) and includes a low noise amplifier (LNA), the passive sixport structure and four detectors. The signal processing in the baseband is done with an ADC-board designed with components from Texas Instruments and a Cyclone IV FPGA board. The integrated receiver circuit has a size of 1320 pm × 950 pm and a low power consumption of 73 mW from a 3.3 V power supply.
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