VLSI设计的硬件仿真

T.A. Horvath, N. H. Kreitzer
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引用次数: 1

摘要

描述了一种商用硬件仿真系统及其预期功能,并回顾了使用现有VLSI芯片进行评估的结果。在此基础上,对仿真系统在ASIC设计中的潜力进行了评估,并提出了需要改进的地方。并对硬件仿真的发展趋势进行了预测。
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Hardware emulation of VLSI designs
A commercially available hardware emulation system and its expected capabilities are described, and results of an evaluation using an existing VLSI chip are reviewed. Based on this experience, the potential of the emulation system in ASIC design is assessed and areas of improvement are suggested. A forecast is also given of possible evolution of hardware emulation.<>
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A development system for an SRAM-based user-reprogrammable gate array Automated CAE tools for full custom design of bipolar analog ASICs A 200 MHz 100 K ECL output buffer for CMOS ASICs Multi circular buffer controller chip for advanced ESM system Rapid prototyping, is there an educational dilemma? (ASIC design)
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