M. Acar, O. Ceylan, Felicia Kiebler, S. Pires, S. Maroldt
{"title":"采用低压驱动的高效GaN射频功率放大器MMIC","authors":"M. Acar, O. Ceylan, Felicia Kiebler, S. Pires, S. Maroldt","doi":"10.23919/EUMIC.2017.8230691","DOIUrl":null,"url":null,"abstract":"In this paper, we show that low-voltage operation of a GaN transistor (5.5V) as a driver allows very high line-up efficiency, including driver and end-stage. We realized two-stage MMIC in 0.25pm GaN HEMT technology. The MMIC die and high harmonic matching circuits were assembled into a standard ceramic RF package. The load-pull measurement results of the packaged MMIC show that the line-up efficiency is preserved to >70% in the presence of an 8 dB output power variation. We designed a PCB based on the load-pull measurement data as a demonstration board. We measured 76% line-up efficiency with an output power of 35.4dBm and a linear gain of 27dB at 2.14 GHz. Applying a WCDMA signal, a −52.4dBc ACLR performance was observed at 29.4dBm average output power using a vector switched generalized memory polynomial digital pre-distortion (VS-GMP DPD) algorithm.","PeriodicalId":120932,"journal":{"name":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","volume":"82 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Highly efficient GaN RF power amplifier MMIC using low-voltage driver\",\"authors\":\"M. Acar, O. Ceylan, Felicia Kiebler, S. Pires, S. Maroldt\",\"doi\":\"10.23919/EUMIC.2017.8230691\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we show that low-voltage operation of a GaN transistor (5.5V) as a driver allows very high line-up efficiency, including driver and end-stage. We realized two-stage MMIC in 0.25pm GaN HEMT technology. The MMIC die and high harmonic matching circuits were assembled into a standard ceramic RF package. The load-pull measurement results of the packaged MMIC show that the line-up efficiency is preserved to >70% in the presence of an 8 dB output power variation. We designed a PCB based on the load-pull measurement data as a demonstration board. We measured 76% line-up efficiency with an output power of 35.4dBm and a linear gain of 27dB at 2.14 GHz. Applying a WCDMA signal, a −52.4dBc ACLR performance was observed at 29.4dBm average output power using a vector switched generalized memory polynomial digital pre-distortion (VS-GMP DPD) algorithm.\",\"PeriodicalId\":120932,\"journal\":{\"name\":\"2017 12th European Microwave Integrated Circuits Conference (EuMIC)\",\"volume\":\"82 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 12th European Microwave Integrated Circuits Conference (EuMIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/EUMIC.2017.8230691\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/EUMIC.2017.8230691","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
在本文中,我们展示了GaN晶体管(5.5V)作为驱动器的低压操作可以实现非常高的排列效率,包括驱动器和终端级。我们在0.25pm GaN HEMT技术中实现了两级MMIC。MMIC芯片和高谐波匹配电路被组装成一个标准的陶瓷射频封装。封装MMIC的负载-拉力测量结果表明,在8 dB输出功率变化的情况下,线路效率保持在>70%。我们根据负载-拉力测量数据设计了一个PCB作为演示板。我们在2.14 GHz时测量了76%的线路效率,输出功率为35.4dBm,线性增益为27dB。应用WCDMA信号,采用矢量开关广义记忆多项式数字预失真(VS-GMP DPD)算法,在29.4dBm平均输出功率下,ACLR性能为- 52.4dBc。
Highly efficient GaN RF power amplifier MMIC using low-voltage driver
In this paper, we show that low-voltage operation of a GaN transistor (5.5V) as a driver allows very high line-up efficiency, including driver and end-stage. We realized two-stage MMIC in 0.25pm GaN HEMT technology. The MMIC die and high harmonic matching circuits were assembled into a standard ceramic RF package. The load-pull measurement results of the packaged MMIC show that the line-up efficiency is preserved to >70% in the presence of an 8 dB output power variation. We designed a PCB based on the load-pull measurement data as a demonstration board. We measured 76% line-up efficiency with an output power of 35.4dBm and a linear gain of 27dB at 2.14 GHz. Applying a WCDMA signal, a −52.4dBc ACLR performance was observed at 29.4dBm average output power using a vector switched generalized memory polynomial digital pre-distortion (VS-GMP DPD) algorithm.