I. Nishimura, Mamoru Yamagami, H. Oji, Taro Hayashi
{"title":"新概念禽肉技术用于低密度禽肉应用","authors":"I. Nishimura, Mamoru Yamagami, H. Oji, Taro Hayashi","doi":"10.23919/IWLPC52010.2020.9375861","DOIUrl":null,"url":null,"abstract":"Various structures and processes for Fan-Out Wafer Level Package (FOWLP) have already been proposed and developed by many companies. We are also one of them and provide new concept FOWLP technology called RISPAC. Our possesses LSI mass production capability; its LSI manufacturing, assembly and test technologies including WLCSP. Based on those technological backgrounds, the substrate material, substrate size, package structure, and process for FOWLP are determined. Our FOWLP technology targets the Low-Density application field which has relatively small number of pins and small package size. The advantage of applying FOWLP can be obtained even in the field of Low-Density applications. In mean time, however, FOWLP for Low-Density applications requires low cost manufacturing in comparison to the conventional packages. The important points of low cost manufacturing are; 1. Number of parts to be taken from a substrate, 2. Production volume, and 3. Production leveling. For this production leveling, it is necessary to possess FOWLP technology complying customers' requests and have enough product portfolio. To comply with the customers' requests, Our FOWLP technology offers “Resin body type” and “Silicon body type.” In particular, the silicon body type FOWLP is developed utilizing the rigidity of the silicon. This enables the ultra -small and ultra-thin dies to be mounted on a small and thin package. This package is achieved without de-bonding technology; by forming Cu interconnect, internal terminals, and external terminals on the three-dimensional structure by electroplating. Then, the resin sealing and resin grinding are conducted. Our FOWLP technology, the silicon body type RDL-1st FOWLP, was able to materialize the required performance and reliability.","PeriodicalId":192698,"journal":{"name":"2020 International Wafer Level Packaging Conference (IWLPC)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Rdl-First Fowlp For Low-Density Applications With New Concept Fowlp Technology\",\"authors\":\"I. Nishimura, Mamoru Yamagami, H. Oji, Taro Hayashi\",\"doi\":\"10.23919/IWLPC52010.2020.9375861\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Various structures and processes for Fan-Out Wafer Level Package (FOWLP) have already been proposed and developed by many companies. We are also one of them and provide new concept FOWLP technology called RISPAC. Our possesses LSI mass production capability; its LSI manufacturing, assembly and test technologies including WLCSP. Based on those technological backgrounds, the substrate material, substrate size, package structure, and process for FOWLP are determined. Our FOWLP technology targets the Low-Density application field which has relatively small number of pins and small package size. The advantage of applying FOWLP can be obtained even in the field of Low-Density applications. In mean time, however, FOWLP for Low-Density applications requires low cost manufacturing in comparison to the conventional packages. The important points of low cost manufacturing are; 1. Number of parts to be taken from a substrate, 2. Production volume, and 3. Production leveling. For this production leveling, it is necessary to possess FOWLP technology complying customers' requests and have enough product portfolio. To comply with the customers' requests, Our FOWLP technology offers “Resin body type” and “Silicon body type.” In particular, the silicon body type FOWLP is developed utilizing the rigidity of the silicon. This enables the ultra -small and ultra-thin dies to be mounted on a small and thin package. This package is achieved without de-bonding technology; by forming Cu interconnect, internal terminals, and external terminals on the three-dimensional structure by electroplating. Then, the resin sealing and resin grinding are conducted. Our FOWLP technology, the silicon body type RDL-1st FOWLP, was able to materialize the required performance and reliability.\",\"PeriodicalId\":192698,\"journal\":{\"name\":\"2020 International Wafer Level Packaging Conference (IWLPC)\",\"volume\":\"38 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-10-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 International Wafer Level Packaging Conference (IWLPC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/IWLPC52010.2020.9375861\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International Wafer Level Packaging Conference (IWLPC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/IWLPC52010.2020.9375861","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Rdl-First Fowlp For Low-Density Applications With New Concept Fowlp Technology
Various structures and processes for Fan-Out Wafer Level Package (FOWLP) have already been proposed and developed by many companies. We are also one of them and provide new concept FOWLP technology called RISPAC. Our possesses LSI mass production capability; its LSI manufacturing, assembly and test technologies including WLCSP. Based on those technological backgrounds, the substrate material, substrate size, package structure, and process for FOWLP are determined. Our FOWLP technology targets the Low-Density application field which has relatively small number of pins and small package size. The advantage of applying FOWLP can be obtained even in the field of Low-Density applications. In mean time, however, FOWLP for Low-Density applications requires low cost manufacturing in comparison to the conventional packages. The important points of low cost manufacturing are; 1. Number of parts to be taken from a substrate, 2. Production volume, and 3. Production leveling. For this production leveling, it is necessary to possess FOWLP technology complying customers' requests and have enough product portfolio. To comply with the customers' requests, Our FOWLP technology offers “Resin body type” and “Silicon body type.” In particular, the silicon body type FOWLP is developed utilizing the rigidity of the silicon. This enables the ultra -small and ultra-thin dies to be mounted on a small and thin package. This package is achieved without de-bonding technology; by forming Cu interconnect, internal terminals, and external terminals on the three-dimensional structure by electroplating. Then, the resin sealing and resin grinding are conducted. Our FOWLP technology, the silicon body type RDL-1st FOWLP, was able to materialize the required performance and reliability.