{"title":"p型无结晶体管(GI-JLT)内栅极的数字和模拟性能","authors":"Sangeeta Singh, P. Kondekar, Ankit Dixit","doi":"10.1109/CIMSIM.2013.70","DOIUrl":null,"url":null,"abstract":"In this paper, digital and analog performance of p-type Gate Inside Junctionless Transistor (GI-JLT) is demonstrated for the first time by using 3-D Bohm Quantum Potential (BQP) transport device simulation to evaluate its use in future CMOS technology. Digital performance analysis exhibits a favourable on/off current ratio and better short-channel characteristics than a gate-all-around (GAA-JLT) junctionless device. Ion improvement by a factor of 3, Ioff reduction by a factor of 10, DIBL is minimized by 34% with slight reduction in subthreshold slope. In analog performance, p-type GI-JLT shows improvement of transconductance (gm) by a multiple of 3, similarly Transconductance generation factor (TGF) (gm/Ids) gets improved and cutoff frequency (fT ) showed improvement by 60% as compared with GAA-JLT. Larger gate electrostatic control is responsible for analog and digital performance improvement of GI-JLT.","PeriodicalId":249355,"journal":{"name":"2013 Fifth International Conference on Computational Intelligence, Modelling and Simulation","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-09-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Digital and Analog Performance of Gate Inside P-Type Junctionless Transistor (GI-JLT)\",\"authors\":\"Sangeeta Singh, P. Kondekar, Ankit Dixit\",\"doi\":\"10.1109/CIMSIM.2013.70\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, digital and analog performance of p-type Gate Inside Junctionless Transistor (GI-JLT) is demonstrated for the first time by using 3-D Bohm Quantum Potential (BQP) transport device simulation to evaluate its use in future CMOS technology. Digital performance analysis exhibits a favourable on/off current ratio and better short-channel characteristics than a gate-all-around (GAA-JLT) junctionless device. Ion improvement by a factor of 3, Ioff reduction by a factor of 10, DIBL is minimized by 34% with slight reduction in subthreshold slope. In analog performance, p-type GI-JLT shows improvement of transconductance (gm) by a multiple of 3, similarly Transconductance generation factor (TGF) (gm/Ids) gets improved and cutoff frequency (fT ) showed improvement by 60% as compared with GAA-JLT. Larger gate electrostatic control is responsible for analog and digital performance improvement of GI-JLT.\",\"PeriodicalId\":249355,\"journal\":{\"name\":\"2013 Fifth International Conference on Computational Intelligence, Modelling and Simulation\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-09-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 Fifth International Conference on Computational Intelligence, Modelling and Simulation\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CIMSIM.2013.70\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 Fifth International Conference on Computational Intelligence, Modelling and Simulation","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CIMSIM.2013.70","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Digital and Analog Performance of Gate Inside P-Type Junctionless Transistor (GI-JLT)
In this paper, digital and analog performance of p-type Gate Inside Junctionless Transistor (GI-JLT) is demonstrated for the first time by using 3-D Bohm Quantum Potential (BQP) transport device simulation to evaluate its use in future CMOS technology. Digital performance analysis exhibits a favourable on/off current ratio and better short-channel characteristics than a gate-all-around (GAA-JLT) junctionless device. Ion improvement by a factor of 3, Ioff reduction by a factor of 10, DIBL is minimized by 34% with slight reduction in subthreshold slope. In analog performance, p-type GI-JLT shows improvement of transconductance (gm) by a multiple of 3, similarly Transconductance generation factor (TGF) (gm/Ids) gets improved and cutoff frequency (fT ) showed improvement by 60% as compared with GAA-JLT. Larger gate electrostatic control is responsible for analog and digital performance improvement of GI-JLT.
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