C. Jan, J. Bielefeld, M. Buehler, V. Chikamane, K. Fischer, T. Hepburn, A. Jain, J. Jeong, T. Kielty, S. Kook, T. Marieb, B. Miner, P. Nguyen, A. Schmitz, M. Nashner, T. Scherban, B. Schroeder, P. Wang, R. Wu, J. Xu, K. Zawadzki, S. Thompson, M. Bohr
{"title":"90纳米代，300毫米晶圆低k ILD/Cu互连技术","authors":"C. Jan, J. Bielefeld, M. Buehler, V. Chikamane, K. Fischer, T. Hepburn, A. Jain, J. Jeong, T. Kielty, S. Kook, T. Marieb, B. Miner, P. Nguyen, A. Schmitz, M. Nashner, T. Scherban, B. Schroeder, P. Wang, R. Wu, J. Xu, K. Zawadzki, S. Thompson, M. Bohr","doi":"10.1109/IITC.2003.1219699","DOIUrl":null,"url":null,"abstract":"This paper presents a 90 nm generation and 300 mm wafer size interconnect technology with 7 layers of Cu metallization and low k ILD. Carbon doped oxide (CDO) low k ILD is used to achieve > 20% inter- and intra-layer capacitance improvement and 25-30% RC improvement over 130 nm generation SiOF interconnect process with equivalent electromigration performance.","PeriodicalId":212619,"journal":{"name":"Proceedings of the IEEE 2003 International Interconnect Technology Conference (Cat. No.03TH8695)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":"{\"title\":\"90 nm generation, 300 mm wafer low k ILD/Cu interconnect technology\",\"authors\":\"C. Jan, J. Bielefeld, M. Buehler, V. Chikamane, K. Fischer, T. Hepburn, A. Jain, J. Jeong, T. Kielty, S. Kook, T. Marieb, B. Miner, P. Nguyen, A. Schmitz, M. Nashner, T. Scherban, B. Schroeder, P. Wang, R. Wu, J. Xu, K. Zawadzki, S. Thompson, M. Bohr\",\"doi\":\"10.1109/IITC.2003.1219699\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a 90 nm generation and 300 mm wafer size interconnect technology with 7 layers of Cu metallization and low k ILD. Carbon doped oxide (CDO) low k ILD is used to achieve > 20% inter- and intra-layer capacitance improvement and 25-30% RC improvement over 130 nm generation SiOF interconnect process with equivalent electromigration performance.\",\"PeriodicalId\":212619,\"journal\":{\"name\":\"Proceedings of the IEEE 2003 International Interconnect Technology Conference (Cat. No.03TH8695)\",\"volume\":\"23 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-06-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"18\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2003 International Interconnect Technology Conference (Cat. No.03TH8695)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IITC.2003.1219699\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2003 International Interconnect Technology Conference (Cat. No.03TH8695)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IITC.2003.1219699","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
90 nm generation, 300 mm wafer low k ILD/Cu interconnect technology
This paper presents a 90 nm generation and 300 mm wafer size interconnect technology with 7 layers of Cu metallization and low k ILD. Carbon doped oxide (CDO) low k ILD is used to achieve > 20% inter- and intra-layer capacitance improvement and 25-30% RC improvement over 130 nm generation SiOF interconnect process with equivalent electromigration performance.
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