基于载波正弦脉宽调制技术的级联h桥多电平逆变器同步策略

2016 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2016-03-20 DOI:10.1109/APEC.2016.7467873

S. Sahoo, T. Bhattacharya

{"title":"基于载波正弦脉宽调制技术的级联h桥多电平逆变器同步策略","authors":"S. Sahoo, T. Bhattacharya","doi":"10.1109/APEC.2016.7467873","DOIUrl":null,"url":null,"abstract":"This paper proposes synchronization strategies for cascaded H-Bridge multi level inverter (CHBMLI) topologies with carrier based sinusoidal pulse width modulation (PWM) techniques. It is presented how synchronous carriers are generated in desired phase and frequency from the instantaneous voltage references to maintain 3-Φ, half wave and quarter wave symmetries among inverter pole voltage outputs for carrier based sinusoidal PWM of CHBMLI. To achieve dynamic synchronization, the triangular carriers are generated from the instantaneous voltage references in a phase locked manner. The scheme is experimentally tested with phase shifted PWM technique for both open loop Vbyf and closed loop vector control of squirrel cage induction motor drive supplied from a 3-Φ 5 level CHBMLI and the results are presented.","PeriodicalId":143091,"journal":{"name":"2016 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Synchronization strategies in cascaded H-Bridge multi level inverters for carrier based sinusoidal PWM techniques\",\"authors\":\"S. Sahoo, T. Bhattacharya\",\"doi\":\"10.1109/APEC.2016.7467873\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes synchronization strategies for cascaded H-Bridge multi level inverter (CHBMLI) topologies with carrier based sinusoidal pulse width modulation (PWM) techniques. It is presented how synchronous carriers are generated in desired phase and frequency from the instantaneous voltage references to maintain 3-Φ, half wave and quarter wave symmetries among inverter pole voltage outputs for carrier based sinusoidal PWM of CHBMLI. To achieve dynamic synchronization, the triangular carriers are generated from the instantaneous voltage references in a phase locked manner. The scheme is experimentally tested with phase shifted PWM technique for both open loop Vbyf and closed loop vector control of squirrel cage induction motor drive supplied from a 3-Φ 5 level CHBMLI and the results are presented.\",\"PeriodicalId\":143091,\"journal\":{\"name\":\"2016 IEEE Applied Power Electronics Conference and Exposition (APEC)\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-03-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Applied Power Electronics Conference and Exposition (APEC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APEC.2016.7467873\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Applied Power Electronics Conference and Exposition (APEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC.2016.7467873","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 10

摘要

提出了基于载波正弦脉宽调制(PWM)技术的级联h桥多电平逆变器(CHBMLI)拓扑同步策略。介绍了基于载波的CHBMLI正弦PWM如何从瞬时参考电压产生所需相位和频率的同步载波，以保持逆变器极电压输出之间的3-Φ、半波和四分之一波对称性。为了实现动态同步，三角形载流子以锁相方式从瞬时电压基准产生。采用移相PWM技术对3-Φ 5级CHBMLI供电的鼠笼式异步电动机开环Vbyf和闭环矢量控制进行了实验测试，并给出了实验结果。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

Synchronization strategies in cascaded H-Bridge multi level inverters for carrier based sinusoidal PWM techniques

This paper proposes synchronization strategies for cascaded H-Bridge multi level inverter (CHBMLI) topologies with carrier based sinusoidal pulse width modulation (PWM) techniques. It is presented how synchronous carriers are generated in desired phase and frequency from the instantaneous voltage references to maintain 3-Φ, half wave and quarter wave symmetries among inverter pole voltage outputs for carrier based sinusoidal PWM of CHBMLI. To achieve dynamic synchronization, the triangular carriers are generated from the instantaneous voltage references in a phase locked manner. The scheme is experimentally tested with phase shifted PWM technique for both open loop Vbyf and closed loop vector control of squirrel cage induction motor drive supplied from a 3-Φ 5 level CHBMLI and the results are presented.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2016 IEEE Applied Power Electronics Conference and Exposition (APEC)

自引率

0.00%

发文量