{"title":"用于DCS1800/W-CDMA应用的双模双标准LNA","authors":"C. P. Moreira, E. Kerhervé, P. Jarry, D. Belor","doi":"10.1109/DTIS.2006.1708730","DOIUrl":null,"url":null,"abstract":"The authors present in this article a dual-standard dual-mode low-noise amplifier (LNA) for DCS1800/W-CDMA-FDD applications. In order to save die area compared to conventional parallel LNAs, an alternative circuit configuration have been used. It consists of sharing the most die consuming elements (inductances) in both operation standards, enabling a more compact solution. The mode and standard selection is performed through a bias scheme (MOS switches) that allows alternating between the two involved standards. The LNA die area is 1.0 times 1.2 mm2 and it consumes 6.8mW (3.8mA under 1.8V), including bias circuitry","PeriodicalId":399250,"journal":{"name":"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A dual-mode dual-standard LNA for DCS1800/W-CDMA applications\",\"authors\":\"C. P. Moreira, E. Kerhervé, P. Jarry, D. Belor\",\"doi\":\"10.1109/DTIS.2006.1708730\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The authors present in this article a dual-standard dual-mode low-noise amplifier (LNA) for DCS1800/W-CDMA-FDD applications. In order to save die area compared to conventional parallel LNAs, an alternative circuit configuration have been used. It consists of sharing the most die consuming elements (inductances) in both operation standards, enabling a more compact solution. The mode and standard selection is performed through a bias scheme (MOS switches) that allows alternating between the two involved standards. The LNA die area is 1.0 times 1.2 mm2 and it consumes 6.8mW (3.8mA under 1.8V), including bias circuitry\",\"PeriodicalId\":399250,\"journal\":{\"name\":\"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-10-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DTIS.2006.1708730\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DTIS.2006.1708730","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A dual-mode dual-standard LNA for DCS1800/W-CDMA applications
The authors present in this article a dual-standard dual-mode low-noise amplifier (LNA) for DCS1800/W-CDMA-FDD applications. In order to save die area compared to conventional parallel LNAs, an alternative circuit configuration have been used. It consists of sharing the most die consuming elements (inductances) in both operation standards, enabling a more compact solution. The mode and standard selection is performed through a bias scheme (MOS switches) that allows alternating between the two involved standards. The LNA die area is 1.0 times 1.2 mm2 and it consumes 6.8mW (3.8mA under 1.8V), including bias circuitry
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