原位掺杂SiGe虚拟衬底上80 nm双轴应变Si nmosfet的泄漏电流降低

J. Hållstedt, B. Malm, P. Hellstrom, M. Ostling, M. Oehme, J. Werner, K. Lyutovich, E. Kasper
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引用次数: 1

摘要

我们提出了一个全面的研究双轴应变(高达~ 3gpa应力)Si nmosfet低至80nm栅极长度。性能良好的80纳米器件具有预期的应变致电增强。重点研究了衬底连接处漏损和漏损源。与常规注入相比,原位掺杂的井和沟道剖面显示了松弛SiGe衬底的衬底结泄漏。通过增加沟道掺杂量和改变沟道方向,可以有效地降低80 nm器件漏极漏源。
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Leakage current reduction in 80 nm biaxially strained Si nMOSFETs on in-situ doped SiGe virtual substrates
We present a comprehensive study of biaxially strained (up to ~3 GPa stress) Si nMOSFETs down to 80 nm gatelength. Well behaved 80 nm devices with expected strain-induced electrical enhancement were demonstrated. Special emphasis was put on investigation of substrate junction leakage and source to drain leakage. In-situ doped wells and channel profiles demonstrated superior substrate junction leakage for the relaxed SiGe substrates compared to conventional implantation. The source to drain leakage in 80 nm devices was effectively reduced by increment of channel doping and rotation of the channel direction.
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