大阵列小间距倒装芯片组件的三维建模:所提模型的验证

W. Kpobie, N. Bonfoh, C. Dreistadt, M. Fendler, P. Lipinski
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引用次数: 3

摘要

分析了基于倒装芯片互连层有效热弹性的微观力学表征的本构模型及其在有限元程序中的实现。考虑到不可能对包含超过一百万个焊点的大尺寸组件进行建模(将需要超过200亿个元件),建议的方法似乎是一个足够的解决方案。用均匀等效材料(HEM)代替由下填料(环氧树脂)包围的焊料凸起组成的互连层,并模拟了组件的制造过程(热加载)。等效模型可以估计互连层各阶段的平均应力场和应变场。这些类型的微电子组件的可靠性可能与互连层的可靠性有关。因此,为了更精确地近似这些阶段的实际应力场和应变场,建立了两种结构变焦模型,即耦合模型和子模型。经过比较,子模型似乎更精确,可以与等效模型一起用于百万像素倒装芯片组装计算。
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3D modeling of flip chip assemblies with large array and small pitch: validation of the proposed model
A constitutive model based on the micromechanical characterization of the effective thermo-elastic properties of the interconnection layer of a flip chip assembly and its implementation in a finite element code is analyzed. Given the impossibility of modeling large-size assemblies containing more than one million solder bumps (more than 20 billion of elements will be needed), the suggested approach seems to be an adequate solution. The interconnection layer consisting of solder bumps surrounded by underfill (epoxy) was replaced by a homogeneous equivalent material (HEM) and the process of manufacturing (thermal loading) of the assembly has been simulated. The equivalent model allows estimation of the mean stress and strain fields in each phase of the interconnection layer. The reliability of these types of microelectronic assembly is potentially related to that of the interconnection layer. Thus, to approximate more precisely the real stress and strain fields in these phases, two structural zooming models were developed namely by coupling and sub-modeling. After comparisons, submodeling seemed to be the more precise and can be used, together with the equivalent model, for a megapixel flip chip assembly calculations.
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