K. Guarini, C. T. Black, Y. Zhang, I. Babich, E. Sikorski, L. Gignac
{"title":"采用模板自组装技术制造的低电压、可扩展纳米晶快闪存储器","authors":"K. Guarini, C. T. Black, Y. Zhang, I. Babich, E. Sikorski, L. Gignac","doi":"10.1109/IEDM.2003.1269340","DOIUrl":null,"url":null,"abstract":"We introduce a new method for building nanocrystal flash memory devices that achieves precise control of nanocrystal size and position. Nanocrystal dimensions are defined via polymer self assembly, facilitating device scaling. Devices exhibit low voltage memory operation with promising retention and endurance properties.","PeriodicalId":344286,"journal":{"name":"IEEE International Electron Devices Meeting 2003","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"43","resultStr":"{\"title\":\"Low voltage, scalable nanocrystal flash memory fabricated by templated self assembly\",\"authors\":\"K. Guarini, C. T. Black, Y. Zhang, I. Babich, E. Sikorski, L. Gignac\",\"doi\":\"10.1109/IEDM.2003.1269340\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We introduce a new method for building nanocrystal flash memory devices that achieves precise control of nanocrystal size and position. Nanocrystal dimensions are defined via polymer self assembly, facilitating device scaling. Devices exhibit low voltage memory operation with promising retention and endurance properties.\",\"PeriodicalId\":344286,\"journal\":{\"name\":\"IEEE International Electron Devices Meeting 2003\",\"volume\":\"51 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-12-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"43\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE International Electron Devices Meeting 2003\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2003.1269340\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Electron Devices Meeting 2003","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2003.1269340","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
We introduce a new method for building nanocrystal flash memory devices that achieves precise control of nanocrystal size and position. Nanocrystal dimensions are defined via polymer self assembly, facilitating device scaling. Devices exhibit low voltage memory operation with promising retention and endurance properties.