Dong-Sun Min Dong-Sun Min, Dong-Il Seo Dong-Il Seo, Jehwan You Jehwan You, Sooin Cho Sooin Cho, Daeje Chin Daeje Chin, Y.E. Park
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Wordline coupling noise reduction techniques for scaled DRAMs
The wordline architecture of the twisted word line (TWL) scheme and a wordline latch circuit for suppressing wordline coupling noise have been proposed and demonstrated. Using this approach, wordline coupling noise is reduced by 70% compared to the conventional wordline structure. This technique was found to be effective for suppressing wordline coupling noise with minimum layout penalty in scaled high-density DRAMs