R. Ishihara, N. Golshani, J. Derakhshandeh, M. R. T. Mofrad, C. Beenakker
{"title":"单粒硅薄膜晶体管的单片3d集成电路","authors":"R. Ishihara, N. Golshani, J. Derakhshandeh, M. R. T. Mofrad, C. Beenakker","doi":"10.1109/ULIS.2011.5758004","DOIUrl":null,"url":null,"abstract":"We propose monolithic 3D-ICs based on single grain Si TFTs where transistors are fabricated inside a silicon grain. Location of the grain was controlled by the µ-Czochralski process which is based on pulsed-laser crystallization of a-Si. Two single-grain TFTs layers were monolithically stacked with electron and hole mobilities of 600 cm2/Vs and 200 cm2/Vs, respectively. Electrical properties are presented of fabricated 6T-SRAM and lateral photodiodes with in-pixel amplifier. Photodiode pixels have a light sensitivity of 100 while SRAM cells fabricated in 128F2 area shows a static noise margin of 0.75V with a supply voltage of 5V.","PeriodicalId":146779,"journal":{"name":"Ulis 2011 Ultimate Integration on Silicon","volume":"81 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Monolithic 3D-ICs with single grain Si thin film transistors\",\"authors\":\"R. Ishihara, N. Golshani, J. Derakhshandeh, M. R. T. Mofrad, C. Beenakker\",\"doi\":\"10.1109/ULIS.2011.5758004\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We propose monolithic 3D-ICs based on single grain Si TFTs where transistors are fabricated inside a silicon grain. Location of the grain was controlled by the µ-Czochralski process which is based on pulsed-laser crystallization of a-Si. Two single-grain TFTs layers were monolithically stacked with electron and hole mobilities of 600 cm2/Vs and 200 cm2/Vs, respectively. Electrical properties are presented of fabricated 6T-SRAM and lateral photodiodes with in-pixel amplifier. Photodiode pixels have a light sensitivity of 100 while SRAM cells fabricated in 128F2 area shows a static noise margin of 0.75V with a supply voltage of 5V.\",\"PeriodicalId\":146779,\"journal\":{\"name\":\"Ulis 2011 Ultimate Integration on Silicon\",\"volume\":\"81 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-03-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Ulis 2011 Ultimate Integration on Silicon\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ULIS.2011.5758004\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Ulis 2011 Ultimate Integration on Silicon","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ULIS.2011.5758004","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Monolithic 3D-ICs with single grain Si thin film transistors
We propose monolithic 3D-ICs based on single grain Si TFTs where transistors are fabricated inside a silicon grain. Location of the grain was controlled by the µ-Czochralski process which is based on pulsed-laser crystallization of a-Si. Two single-grain TFTs layers were monolithically stacked with electron and hole mobilities of 600 cm2/Vs and 200 cm2/Vs, respectively. Electrical properties are presented of fabricated 6T-SRAM and lateral photodiodes with in-pixel amplifier. Photodiode pixels have a light sensitivity of 100 while SRAM cells fabricated in 128F2 area shows a static noise margin of 0.75V with a supply voltage of 5V.