A 2-Channel ADC Using a Delta-Sigma Modulator Without Reset & a Modulated-Sinc-Sum Filter

A new method is proposed for converting any continuously running discrete-time delta-sigma modulator to a multi-channel ADC by modifying only the digital filters. The two input channels are multiplexed and fed to the modulator. The cross-talk that would exist, if the output of the decimation filter is demultiplexed directly, is canceled using a modulated-sinc-sum digital filter, operating at the downsampled rate. This technique avoids reset that is required in incremental ADCs and the input sample-and-hold that is required in previously proposed techniques for multi-channel conversion without reset. A prototype two-channel ADC clocked at 6.144 MHz with a per-channel bandwidth of 22 kHz is demonstrated in a 180 nm CMOS process. It consumes 1.53 mW/channel including the digital filters and achieves a peak SNR/DR of 94.4 dB/98.5 dB, while restricting the inter-channel cross-talk to less than −94 dBc.