{"title":"四维格梯数字滤波器的实现","authors":"M. Kousoulis, G. Antoniou","doi":"10.1109/LASCAS.2016.7450998","DOIUrl":null,"url":null,"abstract":"A circuit realization is presented for four-dimensional (4D) lattice-ladder discrete filters. The proposed 4D circuit realization requires, for its implementation, a minimum number of delay elements. Further, the dimension of the state-vector, of the derived 4D state-space model, is minimal and its 4D transfer function is characterized by the all-pass property. A step-by-step low-order example is provided to demonstrate the proposed minimality of both, circuit, and state-space realizations. An educational conjointment of 4D lattice filters with lower dimension filters (2D, 1D), is imparted.","PeriodicalId":129875,"journal":{"name":"2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Realization of 4D lattice-ladder digital filters\",\"authors\":\"M. Kousoulis, G. Antoniou\",\"doi\":\"10.1109/LASCAS.2016.7450998\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A circuit realization is presented for four-dimensional (4D) lattice-ladder discrete filters. The proposed 4D circuit realization requires, for its implementation, a minimum number of delay elements. Further, the dimension of the state-vector, of the derived 4D state-space model, is minimal and its 4D transfer function is characterized by the all-pass property. A step-by-step low-order example is provided to demonstrate the proposed minimality of both, circuit, and state-space realizations. An educational conjointment of 4D lattice filters with lower dimension filters (2D, 1D), is imparted.\",\"PeriodicalId\":129875,\"journal\":{\"name\":\"2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS)\",\"volume\":\"75 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-02-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/LASCAS.2016.7450998\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LASCAS.2016.7450998","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A circuit realization is presented for four-dimensional (4D) lattice-ladder discrete filters. The proposed 4D circuit realization requires, for its implementation, a minimum number of delay elements. Further, the dimension of the state-vector, of the derived 4D state-space model, is minimal and its 4D transfer function is characterized by the all-pass property. A step-by-step low-order example is provided to demonstrate the proposed minimality of both, circuit, and state-space realizations. An educational conjointment of 4D lattice filters with lower dimension filters (2D, 1D), is imparted.