Analysis of Breakdown Characteristics of AIGaN/GaN HEMTs with Low- $k$ IHigh- $k$ Double Passivation Layers Paper Title

Two-dimensional analysis of off-state drain current-drain voltage characteristics in AIGaN/GaN high electron mobility transistors is performed; where two cases with a single passivation layer (SiN or high- $k$ dielectric) and double passivation layers (SiN and high- $k$ dielectric) are compared. It is shown that in the case of double passivation layers, the breakdown voltage is enhanced significantly as compared to the case of SiN single passivation layer when comparing at the same insulator thickness. This is because the electric field around the drain edge of gate is weakened. However, it is lowered remarkably as compared to the case with a high- $k$ single passivation layer even if the first SiN layer is rather thin. Also, in the case of double passivation layers, the breakdown voltage is shown to become close to the case with high- $k$ passivation layer when the relative permittivity of the second passivation layer becomes high and the SiN layer is thin.