逐次消列极解码器的快速多比特判定方法

Seo Lin Jeong, Seung Yong Kim, J. Bae, M. Sunwoo
{"title":"逐次消列极解码器的快速多比特判定方法","authors":"Seo Lin Jeong, Seung Yong Kim, J. Bae, M. Sunwoo","doi":"10.1109/ISOCC47750.2019.9078465","DOIUrl":null,"url":null,"abstract":"SC and SCL are the decoding algorithms for polar codes that have the disadvantage of high latency due to serial operations. Several algorithms, such as Fast-SSC, multibit decision, have been proposed to improve the latency with additional circuits, however, areas become larger. This paper proposes an efficient multibit decision algorithm to improve latency based on the SCL algorithm. In addition, we propose the combined nodes that combine node types of the fast-SSC algorithm to increase area efficiency and reduce the number of decoding cycles.","PeriodicalId":113802,"journal":{"name":"2019 International SoC Design Conference (ISOCC)","volume":"140 1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Fast Multibit Decision Method for Successive-Cancellation List Polar Decoder\",\"authors\":\"Seo Lin Jeong, Seung Yong Kim, J. Bae, M. Sunwoo\",\"doi\":\"10.1109/ISOCC47750.2019.9078465\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"SC and SCL are the decoding algorithms for polar codes that have the disadvantage of high latency due to serial operations. Several algorithms, such as Fast-SSC, multibit decision, have been proposed to improve the latency with additional circuits, however, areas become larger. This paper proposes an efficient multibit decision algorithm to improve latency based on the SCL algorithm. In addition, we propose the combined nodes that combine node types of the fast-SSC algorithm to increase area efficiency and reduce the number of decoding cycles.\",\"PeriodicalId\":113802,\"journal\":{\"name\":\"2019 International SoC Design Conference (ISOCC)\",\"volume\":\"140 1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-10-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 International SoC Design Conference (ISOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISOCC47750.2019.9078465\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 International SoC Design Conference (ISOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISOCC47750.2019.9078465","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

SC和SCL是极性码的解码算法,由于串行操作而具有高延迟的缺点。一些算法,如Fast-SSC,多比特判决,已被提出,以改善延迟与额外的电路,然而,面积变得更大。本文在SCL算法的基础上,提出了一种有效的多比特决策算法来改善延迟。此外,我们还提出了结合快速ssc算法节点类型的组合节点,以提高区域效率并减少解码周期数。
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Fast Multibit Decision Method for Successive-Cancellation List Polar Decoder
SC and SCL are the decoding algorithms for polar codes that have the disadvantage of high latency due to serial operations. Several algorithms, such as Fast-SSC, multibit decision, have been proposed to improve the latency with additional circuits, however, areas become larger. This paper proposes an efficient multibit decision algorithm to improve latency based on the SCL algorithm. In addition, we propose the combined nodes that combine node types of the fast-SSC algorithm to increase area efficiency and reduce the number of decoding cycles.
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