用于高效率直接48V/1V应用的叠加二次降压变换器

Jin Woong Kwak, D. Ma
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引用次数: 0

摘要

为了寻找高密度、高效率的大降压DC-DC功率转换器,最近报道了许多混合转换器拓扑,其中不同的功率级串联合并以实现高降压电压转换比。然而,由于串联拓扑组合的方法,这些拓扑面临着直接的性能挑战,这不仅增加了功率器件的数量,而且需要在这些器件之间进行精心安排的时序控制。为了克服这些挑战,本文提出了一种新的二次降压变换器,采用了一种非正统的拓扑叠加方法。与现有技术相比,所得到的叠加二次降压(SQB)转换器需要的功率器件数量最少。由于二次转换比,变换器的导通时间大大放宽。它以最小的有效值电流并联提供功率,从而实现高效率。同时,由于电感固有的电流纹波抵消和所提出的电感尺寸方案,输出电压纹波大大减小。本设计的实验样机实现了48v到1v的直接功率转换,最大负载为20A,峰值效率为94.5%。
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Superimposed Quadratic Buck Converter for High-Efficiency Direct 48V/1V Applications
In the search for high-density and high-efficiency large step-down DC-DC power converters, numerous hybrid converter topologies are reported recently, in which distinct power stages are merged in series to achieve a high step-down voltage conversion ratio. However, these topologies face immediate performance challenges due to the method of series topology combination, which not only increases power device count but also requires well-orchestrated timing control between these devices. To overcome such challenges, this paper presents a new quadratic step-down converter using an unorthodox method of topology superimposition. The resulting superimposed quadratic buck (SQB) converter requires the lowest power device count compared to prior arts. Thanks to the quadratic conversion ratio, the ON-time of the converter is substantially relaxed. It delivers power in parallel paths with minimized RMS current for high efficiency. Meanwhile, the output voltage ripples are largely reduced owing to the inherent inductor current ripple cancellation and the proposed inductor sizing scheme. An experimental prototype of this design achieves direct 48V-to-1V power conversion with a maximum load of 20A and a peak efficiency of 94.5%.
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