通过增加终端电阻使差分串行链路收发器的功率降低37%

Jong-Hoon Kim, Soo-Min Lee, J. Sim, Byungsub Kim, Hong-June Park
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引用次数: 1

摘要

通过在带有CML驱动器的差分串行链路的TX和RX两端增加4ZO的终端电阻,收发器功率降低37%。传输功率降低54%。TX包括一个CML驱动程序、一个预驱动程序和一个序列化程序。当反射和ISI由于终端电阻的增加而增加时,它们由RX处的2抽头DFE电路补偿。在初始训练模式中自动找到反射的DFE档位以及ISI和反射的DFE系数。采用0.13μm工艺制作的收发器芯片在5Gbps下具有25cm、30cm和35cm的FR4通道,其误码率< 1E-12。
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A power reduction of 37% in a differential serial link transceiver by increasing the termination resistance
By increasing the termination resistance to 4ZO at both TX and RX of a differential serial link with a CML driver, the transceiver power is reduced by 37%. The TX power is reduced by 54%. The TX includes a CML driver, a pre-driver and a serializer. While the reflection and the ISI are increased due to the increase of the termination resistance, they are compensated for by a 2-tap DFE circuit at RX. The DFE tap position for reflection and the DFE coefficients for ISI and reflection are found automatically during the initial training mode. The transceiver chip fabricated in a 0.13μm process shows a BER<;1E-12 with 25, 30 and 35cm FR4 channels at 5Gbps.
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