{"title":"采用双蚀刻氮化硅衬底的半桥开关替代集成方案","authors":"A. Solomon, A. Castellazzi","doi":"10.1109/ESTC.2014.6962723","DOIUrl":null,"url":null,"abstract":"The recent research exercises have targeted the transfer of the sandwich package benefits to application bespoke switch design, including flipchip and device stacking topology [1]. This paper will present the work in an alternative integration scheme for a half-bridge switch using 70μm thin Si IGBTs and diodes addressing higher strength, higher toughness and higher thermal conductivity. Using alumina ceramic substrates are prone to failure compared to silicon nitride. The switch is totally wire bond less where bonded wires have large parasitic inductance which deteriorates the electromagnetic performance. In addition to the wire bond, the interconnection pattern plays a great roll of helping the loop current to be entirely vertical.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Alternative integration scheme for half-bridge switch using double etched Si3N4 substrate\",\"authors\":\"A. Solomon, A. Castellazzi\",\"doi\":\"10.1109/ESTC.2014.6962723\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The recent research exercises have targeted the transfer of the sandwich package benefits to application bespoke switch design, including flipchip and device stacking topology [1]. This paper will present the work in an alternative integration scheme for a half-bridge switch using 70μm thin Si IGBTs and diodes addressing higher strength, higher toughness and higher thermal conductivity. Using alumina ceramic substrates are prone to failure compared to silicon nitride. The switch is totally wire bond less where bonded wires have large parasitic inductance which deteriorates the electromagnetic performance. In addition to the wire bond, the interconnection pattern plays a great roll of helping the loop current to be entirely vertical.\",\"PeriodicalId\":299981,\"journal\":{\"name\":\"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)\",\"volume\":\"20 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-11-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESTC.2014.6962723\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESTC.2014.6962723","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Alternative integration scheme for half-bridge switch using double etched Si3N4 substrate
The recent research exercises have targeted the transfer of the sandwich package benefits to application bespoke switch design, including flipchip and device stacking topology [1]. This paper will present the work in an alternative integration scheme for a half-bridge switch using 70μm thin Si IGBTs and diodes addressing higher strength, higher toughness and higher thermal conductivity. Using alumina ceramic substrates are prone to failure compared to silicon nitride. The switch is totally wire bond less where bonded wires have large parasitic inductance which deteriorates the electromagnetic performance. In addition to the wire bond, the interconnection pattern plays a great roll of helping the loop current to be entirely vertical.