Achieving Short Circuit Capability for 600 V GaN FETs Using a Gate-Source-Shorted Si Depletion-Mode MOSFET in Series with the Source

Gallium Nitride FETs have poor short-circuit withstand capability at high DC bus voltages with on-state gate drive voltage. In this paper, the BaSIC(DMM) topology that employs a low voltage Si depletion-mode MOSFET (DMM) in series with source of the GaN FET is demonstrated to suppress the peak short-circuit current and extend the SC withstand time. Experimental results are provided for commercially available 600 V Cascode GaN FETs. The SC withstand time was increased from 0.33 $\mu$ s to 4.35 $\mu$ s at a drain bias of 400 V with gate bias of 8 V, an improvement by a factor of 13x. Under normal power circuit operating conditions, the BaSIC(DMM) topology produces a 29 % increase in on-resistance and almost no change in switching losses.