{"title":"用于硬件/软件系统的规范、模拟和划分的c++基类","authors":"Christoph Weiler, U. Kebschull, W. Rosenstiel","doi":"10.1109/ASPDAC.1995.486402","DOIUrl":null,"url":null,"abstract":"The paper introduces a novel method of specification, simulation and partitioning on the system level using a common and convenient language (C++). Special base classes provide explicit concurrency and additional possibilities for analyzing and simulating the whole system during an early design phase. The hardware/software partitioning algorithm uses the results of the analysis and simulation in order to partition the specification into hardware and software.","PeriodicalId":119232,"journal":{"name":"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair","volume":"1946 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-08-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":"{\"title\":\"C++ base classes for specification, simulation and partitioning of a hardware/software system\",\"authors\":\"Christoph Weiler, U. Kebschull, W. Rosenstiel\",\"doi\":\"10.1109/ASPDAC.1995.486402\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper introduces a novel method of specification, simulation and partitioning on the system level using a common and convenient language (C++). Special base classes provide explicit concurrency and additional possibilities for analyzing and simulating the whole system during an early design phase. The hardware/software partitioning algorithm uses the results of the analysis and simulation in order to partition the specification into hardware and software.\",\"PeriodicalId\":119232,\"journal\":{\"name\":\"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair\",\"volume\":\"1946 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-08-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"19\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASPDAC.1995.486402\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.1995.486402","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
C++ base classes for specification, simulation and partitioning of a hardware/software system
The paper introduces a novel method of specification, simulation and partitioning on the system level using a common and convenient language (C++). Special base classes provide explicit concurrency and additional possibilities for analyzing and simulating the whole system during an early design phase. The hardware/software partitioning algorithm uses the results of the analysis and simulation in order to partition the specification into hardware and software.
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