L. Bisdounis, S. Nikolaidis, O. Koufopavlou, C. Goutis
{"title":"CMOS逆变器的精确定时模型","authors":"L. Bisdounis, S. Nikolaidis, O. Koufopavlou, C. Goutis","doi":"10.1109/ICECS.1996.582696","DOIUrl":null,"url":null,"abstract":"This paper introduces an accurate, analytical timing model for the CMOS inverter. Analytical output waveform expressions for all the inverter operation regions and input waveform slopes are derived, which take into account the complete expression of the short-circuit current and the gate-to-drain coupling capacitance.","PeriodicalId":402369,"journal":{"name":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Accurate timing model for the CMOS inverter\",\"authors\":\"L. Bisdounis, S. Nikolaidis, O. Koufopavlou, C. Goutis\",\"doi\":\"10.1109/ICECS.1996.582696\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper introduces an accurate, analytical timing model for the CMOS inverter. Analytical output waveform expressions for all the inverter operation regions and input waveform slopes are derived, which take into account the complete expression of the short-circuit current and the gate-to-drain coupling capacitance.\",\"PeriodicalId\":402369,\"journal\":{\"name\":\"Proceedings of Third International Conference on Electronics, Circuits, and Systems\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-10-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of Third International Conference on Electronics, Circuits, and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECS.1996.582696\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.1996.582696","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper introduces an accurate, analytical timing model for the CMOS inverter. Analytical output waveform expressions for all the inverter operation regions and input waveform slopes are derived, which take into account the complete expression of the short-circuit current and the gate-to-drain coupling capacitance.