{"title":"p/sup +/扩散和p通道栅极下n孔片电阻的测量","authors":"R. A. Ashton","doi":"10.1109/ICMTS.1999.766214","DOIUrl":null,"url":null,"abstract":"Van der Pauw test structures for the measurement of N-well sheet resistance under p/sup +/ diffusion and under p channel gate for CMOS technologies on p substrates are presented.","PeriodicalId":273071,"journal":{"name":"ICMTS 1999. Proceedings of 1999 International Conference on Microelectronic Test Structures (Cat. No.99CH36307)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Measurement of N-well sheet resistance under p/sup +/ diffusion and p channel gate\",\"authors\":\"R. A. Ashton\",\"doi\":\"10.1109/ICMTS.1999.766214\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Van der Pauw test structures for the measurement of N-well sheet resistance under p/sup +/ diffusion and under p channel gate for CMOS technologies on p substrates are presented.\",\"PeriodicalId\":273071,\"journal\":{\"name\":\"ICMTS 1999. Proceedings of 1999 International Conference on Microelectronic Test Structures (Cat. No.99CH36307)\",\"volume\":\"45 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-03-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ICMTS 1999. Proceedings of 1999 International Conference on Microelectronic Test Structures (Cat. No.99CH36307)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICMTS.1999.766214\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICMTS 1999. Proceedings of 1999 International Conference on Microelectronic Test Structures (Cat. No.99CH36307)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMTS.1999.766214","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
提出了在p基板上测量p/sup +/扩散和p通道栅极下的n阱片电阻的Van der Pauw测试结构。
Measurement of N-well sheet resistance under p/sup +/ diffusion and p channel gate
Van der Pauw test structures for the measurement of N-well sheet resistance under p/sup +/ diffusion and under p channel gate for CMOS technologies on p substrates are presented.