{"title":"采用基于局部电容的积分方程法计算共享反垫结构的电容","authors":"Hanfeng Wang, A. Ruehli, J. Fan","doi":"10.1109/EPEPS.2011.6100244","DOIUrl":null,"url":null,"abstract":"An integral equation method used for capacitance extraction for axially symmetric geometries is extended in this paper to calculate the via-plane capacitances in shared-antipad via structures, by changing the circular ring cells to arc ones. The proposed method is validated with a commercial finite element method based tool for a typical structure used in modern high-speed printed circuit design.","PeriodicalId":313560,"journal":{"name":"2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Capacitance calculation for a shared-antipad via structure using an integral equation method based on partial capacitance\",\"authors\":\"Hanfeng Wang, A. Ruehli, J. Fan\",\"doi\":\"10.1109/EPEPS.2011.6100244\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An integral equation method used for capacitance extraction for axially symmetric geometries is extended in this paper to calculate the via-plane capacitances in shared-antipad via structures, by changing the circular ring cells to arc ones. The proposed method is validated with a commercial finite element method based tool for a typical structure used in modern high-speed printed circuit design.\",\"PeriodicalId\":313560,\"journal\":{\"name\":\"2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-12-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEPS.2011.6100244\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEPS.2011.6100244","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Capacitance calculation for a shared-antipad via structure using an integral equation method based on partial capacitance
An integral equation method used for capacitance extraction for axially symmetric geometries is extended in this paper to calculate the via-plane capacitances in shared-antipad via structures, by changing the circular ring cells to arc ones. The proposed method is validated with a commercial finite element method based tool for a typical structure used in modern high-speed printed circuit design.
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