P. Razavi, G. Fagas, I. Ferain, N. Akhavan, R. Yu, J. Colinge
{"title":"短通道无结多栅极晶体管的性能研究","authors":"P. Razavi, G. Fagas, I. Ferain, N. Akhavan, R. Yu, J. Colinge","doi":"10.1109/ULIS.2011.5758005","DOIUrl":null,"url":null,"abstract":"We investigate the performance of short channel junctionless gate-all-around (GAA) transistors, by comparing the I_V characteristics, subthreshold swing and drain-induced barrier lowring (DIBL) of junctionless GAA transistors with accumulation-mode GAA transistors. We also compare the I_V characteristics of junctionless GAA transistors for different wafer and transport orientations. MuGFETs are investigated for different wafer and channel orientation.","PeriodicalId":146779,"journal":{"name":"Ulis 2011 Ultimate Integration on Silicon","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":"{\"title\":\"Performance investigation of short-channel junctionless multigate transistors\",\"authors\":\"P. Razavi, G. Fagas, I. Ferain, N. Akhavan, R. Yu, J. Colinge\",\"doi\":\"10.1109/ULIS.2011.5758005\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We investigate the performance of short channel junctionless gate-all-around (GAA) transistors, by comparing the I_V characteristics, subthreshold swing and drain-induced barrier lowring (DIBL) of junctionless GAA transistors with accumulation-mode GAA transistors. We also compare the I_V characteristics of junctionless GAA transistors for different wafer and transport orientations. MuGFETs are investigated for different wafer and channel orientation.\",\"PeriodicalId\":146779,\"journal\":{\"name\":\"Ulis 2011 Ultimate Integration on Silicon\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-03-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"16\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Ulis 2011 Ultimate Integration on Silicon\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ULIS.2011.5758005\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Ulis 2011 Ultimate Integration on Silicon","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ULIS.2011.5758005","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Performance investigation of short-channel junctionless multigate transistors
We investigate the performance of short channel junctionless gate-all-around (GAA) transistors, by comparing the I_V characteristics, subthreshold swing and drain-induced barrier lowring (DIBL) of junctionless GAA transistors with accumulation-mode GAA transistors. We also compare the I_V characteristics of junctionless GAA transistors for different wafer and transport orientations. MuGFETs are investigated for different wafer and channel orientation.