应变硅工程增强器件迁移性的研究现状

C. Mazure, I. Cayrefourcq
{"title":"应变硅工程增强器件迁移性的研究现状","authors":"C. Mazure, I. Cayrefourcq","doi":"10.1109/SOI.2005.1563517","DOIUrl":null,"url":null,"abstract":"Strained silicon engineering has become a key innovation to enhance device on-current. It has allowed the IC industry to keep on the scaling path and assure a performance gain from one technology node to the next. Uniaxial strained silicon has already made its way into 90nm IC manufacturing. Biaxial wafer level strain may be the next step for boosting transistor performance. At the substrate level, strained silicon on insulator is a major innovation that offers higher carrier mobility, combining the advantages of SOI with those of strained silicon. This review focuses on the development of strained silicon, its impact on device properties and its scalability beyond 65nm design rules.","PeriodicalId":116606,"journal":{"name":"2005 IEEE International SOI Conference Proceedings","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Status of device mobility enhancement through strained silicon engineering\",\"authors\":\"C. Mazure, I. Cayrefourcq\",\"doi\":\"10.1109/SOI.2005.1563517\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Strained silicon engineering has become a key innovation to enhance device on-current. It has allowed the IC industry to keep on the scaling path and assure a performance gain from one technology node to the next. Uniaxial strained silicon has already made its way into 90nm IC manufacturing. Biaxial wafer level strain may be the next step for boosting transistor performance. At the substrate level, strained silicon on insulator is a major innovation that offers higher carrier mobility, combining the advantages of SOI with those of strained silicon. This review focuses on the development of strained silicon, its impact on device properties and its scalability beyond 65nm design rules.\",\"PeriodicalId\":116606,\"journal\":{\"name\":\"2005 IEEE International SOI Conference Proceedings\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-12-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2005 IEEE International SOI Conference Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOI.2005.1563517\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 IEEE International SOI Conference Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.2005.1563517","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10

摘要

应变硅工程已成为提高器件导通电流的关键技术。它使集成电路行业能够保持扩展路径,并确保从一个技术节点到下一个技术节点的性能增益。单轴应变硅已经进入90纳米集成电路制造。双轴晶圆级应变可能是提高晶体管性能的下一步。在衬底层面,绝缘体上的应变硅是一项重大创新,它结合了SOI和应变硅的优点,提供了更高的载流子迁移率。本文重点介绍了应变硅的发展,其对器件性能的影响及其在65nm设计规则之外的可扩展性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Status of device mobility enhancement through strained silicon engineering
Strained silicon engineering has become a key innovation to enhance device on-current. It has allowed the IC industry to keep on the scaling path and assure a performance gain from one technology node to the next. Uniaxial strained silicon has already made its way into 90nm IC manufacturing. Biaxial wafer level strain may be the next step for boosting transistor performance. At the substrate level, strained silicon on insulator is a major innovation that offers higher carrier mobility, combining the advantages of SOI with those of strained silicon. This review focuses on the development of strained silicon, its impact on device properties and its scalability beyond 65nm design rules.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
The effect of integration of strontium-bismuth-tantalate capacitors onto SOI wafers A novel self-aligned substrate-diode structure for SOI technologies Development of stacking faults in strained silicon layers 3D via etch development for 3D circuit integration in FDSOI Stress technology impact on device performance and reliability for <100> sub-90nm SOI CMOSFETs
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1