磨削工艺对半导体芯片强度的影响

Enboa Wu, I.G. Shih, Y.N. Chen, S.C. Chen, C.Z. Tsai, C. Shao
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引用次数: 13

摘要

研究了半导体芯片在晶圆上的强度分布,以及背面磨削工艺对芯片强度的影响。采用符合ASTM E855标准的三点弯曲试验来测量切屑强度。第一组测试车辆来自三个8英寸的晶圆。一个是28mils厚,没有背面研磨,另外两个背面研磨到18mils和11mils厚。然后,使用4个6英寸晶圆作为第二组测试车辆。前两块为22mm厚,背面研磨,另外两块为27mm厚,未研磨。第三组测试车辆由3个相同厚度(11毫米)和尺寸的8英寸晶圆组成,但它们是由不同的工厂在背后研磨的。研究发现,在未进行背面磨削的晶片上,晶片强度是随机分布的,而任何经过背面磨削的晶片都会产生弱区。无论芯片尺寸如何,弱区芯片的平均强度比整个晶圆计算的平均强度低约30%。
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Influence of grinding process on semiconductor chip strength
Studies the strength distribution of semiconductor chips on a wafer, and the influence of the back-side grinding process on the chip strength.. The three-point bending test, complying with the ASTM standard E855, was adopted to measure the chip strength. The first set of test vehicles is from three 8-inch wafers. One is of 28 mils thick without backside grinding, and the other two are backside ground to 18 mils and 11 mils thick. Then, four 6-inch wafers were used as the second set of test vehicles. The first two were 22 mils thick which were backside ground and the other two wafers were 27 mils in thickness without grinding. The third set of test vehicles was formed by three 8-inch wafers of identical thickness (11-mil) and size, but they were backside ground by different factories. It is found that, whereas the chip strength distributed randomly on a wafer which did not experience any backside grinding, any wafers that were subjected to backside grinding always resulted in weak regions. The averaged strength for the chips in the weak region was approximately 30% lower than the averaged strength calculated from the whole wafer, regardless of the chip dimension.
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