{"title":"超高电流密度功率mosfet的特性","authors":"J. Evans, G. Amaratunga","doi":"10.1109/ISPSD.1996.509470","DOIUrl":null,"url":null,"abstract":"This paper presents a new description of the operation of a power MOSFET which is aimed at assisting in the design of devices which operate at high current densities. We analyse the charge balances within a power MOSFET (DMOS or UMOS) and show how these conspire to dictate the operation of the device. We report on the manufacture of a UMOS device with 0.8 /spl mu/m cells with 0.4 /spl mu/m trench widths=540/spl times/10/sup 6/ cells/in/sup 2/.","PeriodicalId":377997,"journal":{"name":"8th International Symposium on Power Semiconductor Devices and ICs. ISPSD '96. Proceedings","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":"{\"title\":\"The behaviour of very high current density power MOSFETs\",\"authors\":\"J. Evans, G. Amaratunga\",\"doi\":\"10.1109/ISPSD.1996.509470\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a new description of the operation of a power MOSFET which is aimed at assisting in the design of devices which operate at high current densities. We analyse the charge balances within a power MOSFET (DMOS or UMOS) and show how these conspire to dictate the operation of the device. We report on the manufacture of a UMOS device with 0.8 /spl mu/m cells with 0.4 /spl mu/m trench widths=540/spl times/10/sup 6/ cells/in/sup 2/.\",\"PeriodicalId\":377997,\"journal\":{\"name\":\"8th International Symposium on Power Semiconductor Devices and ICs. ISPSD '96. Proceedings\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-05-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"15\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"8th International Symposium on Power Semiconductor Devices and ICs. ISPSD '96. Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPSD.1996.509470\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"8th International Symposium on Power Semiconductor Devices and ICs. ISPSD '96. Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.1996.509470","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The behaviour of very high current density power MOSFETs
This paper presents a new description of the operation of a power MOSFET which is aimed at assisting in the design of devices which operate at high current densities. We analyse the charge balances within a power MOSFET (DMOS or UMOS) and show how these conspire to dictate the operation of the device. We report on the manufacture of a UMOS device with 0.8 /spl mu/m cells with 0.4 /spl mu/m trench widths=540/spl times/10/sup 6/ cells/in/sup 2/.
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