三维集成电路中硅通孔(TSV)对有源电路噪声耦合的屏蔽结构

Jaemin Lim, Manho Lee, D. Jung, Jonghoon J. Kim, Sumin Choi, Hyunsuk Lee, Joungho Kim
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引用次数: 6

摘要

通过硅通孔(TSV)技术已被广泛强调为小尺寸、宽带宽、低功耗和紧凑集成多芯片的关键解决方案。尽管基于TSV的三维集成电路(3D IC)具有许多优点,但仍存在一些挑战需要克服,例如噪声耦合,制造工艺限制和故障问题。在本文中,我们提出了三维集成电路中TSV与有源电路噪声耦合的屏蔽结构,该结构可以通过阻断有源电路LC-VCO的噪声路径来捕获TSV衬底噪声。通过三维电磁仿真得到的频域噪声耦合系数,分析了噪声抑制机理。研究并比较了不同屏蔽结构对LC-VCO有源电路的灵敏度,如相位噪声。
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Shielding structures for through silicon via (TSV) to active circuit noise coupling in 3D IC
Through silicon via (TSV) has been extensively highlighted as the key solution for small form factor wide bandwidth, and low power consumption with compactly integrating multiple chips. Despite the many advantages of TSV based 3-dimensional integrated circuit (3D IC), there are several challenges to be overcome such as noise coupling, fabrication process limits, and failure issues. In this paper, we proposed shielding structures for TSV to active circuit noise coupling in 3D IC. The proposed structures can capture TSV substrate noise by blocking the noise paths to active circuit, LC-VCO in this study. The noise suppression mechanisms are analyzed by the noise coupling coefficient in frequency-domain obtained by 3D electromagnetic simulation. Various shielding structures are investigated and compared with regard to sensitivity of active circuit, such as phase noise of LC-VCO.
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