A Polynomial Multiplication Accelerator for Homomorphic Encryption using DGT

In modern information society, data security has become more and more critical. Homomorphic encryption is one of the best choice to solve the security problem of user data on the server because of its unique characteristics of allowing operations in the ciphertext. A homomorphic encryption scheme based on R-LWE is a hotspot in research and application. Polynomial multiplication in ℤp[x]/(xn+1) has brought significant attention recently. The key to accelerating the FV homomorphic encryption scheme is to accelerate the polynomial multiplication [1]. Traditional accelerators use the NTT algorithm. However, the conventional NTT scheme will cause the expansion of the number of terms after the operation, requiring additional modular reduction calculations. This paper presents a hardware accelerator for polynomial multiplication based on Discrete Galois Transform. Compared with traditional NTT, DGT cuts the length of the polynomial by half [2]. At the same time, a negative loop convolution is added to avoid additional modular reduction calculations. We designs a DGT-based hardware accelerator for polynomial multiplication on the ring. At the same time, a particular improvement is made to the DGT algorithm to make it friendly to hardware design and save some cycles. Experimental results show that our accelerator via DGT can effectively improve the multiplication speed of polynomials.